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authorVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 15:54:44 +0000
committerVikram S. Adve <vadve@cs.uiuc.edu>2001-11-14 15:54:44 +0000
commitea1a93b95d30ce138420b6a740bb8d1bd274470c (patch)
tree10f20f6e136c123e31ae2979d4cdbf0aee0db96f /llvm/lib
parent7765ca8b25ae2f4a6ad60bc2d3fbabb220f852a1 (diff)
downloadbcm5719-llvm-ea1a93b95d30ce138420b6a740bb8d1bd274470c.tar.gz
bcm5719-llvm-ea1a93b95d30ce138420b6a740bb8d1bd274470c.zip
Change latency of SETX to improve schedule -- just a hack.
llvm-svn: 1304
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Sparc/SparcInstr.def2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstr.def b/llvm/lib/Target/Sparc/SparcInstr.def
index 89322ff1e34..02d5c8eda0e 100644
--- a/llvm/lib/Target/Sparc/SparcInstr.def
+++ b/llvm/lib/Target/Sparc/SparcInstr.def
@@ -46,7 +46,7 @@ I(NOP, "nop", 0, -1, 0, false, 0, 1, SPARC_NONE, M_NOP_FLAG)
// Use a latency > 1 since this may generate as many as 3 instructions.
I(SETSW, "setsw", 2, 1, 0, true , 0, 2, SPARC_IEUN, M_INT_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
I(SETUW, "setuw", 2, 1, 0, false, 0, 2, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
-I(SETX, "setx", 3, 2, 0, true, 0, 5, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
+I(SETX, "setx", 3, 2, 0, true, 0, 2, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG | M_PSEUDO_FLAG )
// Set high-order bits of register and clear low-order bits
I(SETHI, "sethi", 2, 1, B22, false, 0, 1, SPARC_IEUN, M_INT_FLAG | M_LOGICAL_FLAG | M_ARITH_FLAG)
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