diff options
| author | Jina Nahias <jina.nahias@intel.com> | 2017-10-30 10:35:53 +0000 |
|---|---|---|
| committer | Jina Nahias <jina.nahias@intel.com> | 2017-10-30 10:35:53 +0000 |
| commit | e63db55c6703aa9f33182e4c97896c6e2e1c1304 (patch) | |
| tree | 558427d6db208f0ede305e084b07a07cf6006f62 /llvm/lib | |
| parent | a6b1fbece11f2cece7f3682f9e9e1b7146235f49 (diff) | |
| download | bcm5719-llvm-e63db55c6703aa9f33182e4c97896c6e2e1c1304.tar.gz bcm5719-llvm-e63db55c6703aa9f33182e4c97896c6e2e1c1304.zip | |
Revert "[X86][AVX512] Adding a pattern for broadcastm intrinsic."
This reverts commit r316890.
Change-Id: I683cceee9848ef309b452293086b1f26a941950d
llvm-svn: 316894
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 02b83e2e3fa..6fb94700b9f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6687,44 +6687,6 @@ static bool isUseOfShuffle(SDNode *N) { return false; } -// Check if the current node of build vector is a zero extended vector. -// If so, return the value extended. -// For example: (0,0,0,a,0,0,0,a,0,0,0,a,0,0,0,a) returns a. -// NumElt - return the number of zero extended identical values. -// EltType - return the type of the value include the zero extend. -static SDValue isSplatZeroExtended(const BuildVectorSDNode *Op, - unsigned &NumElt, MVT &EltType) { - SDValue ExtValue = Op->getOperand(0); - unsigned NumElts = Op->getNumOperands(); - unsigned Delta = NumElts; - - for (unsigned i = 1; i < NumElts; i++) { - if (Op->getOperand(i) == ExtValue) { - Delta = i; - break; - } - if (!(Op->getOperand(i).isUndef() || isNullConstant(Op->getOperand(i)))) - return SDValue(); - } - if (!isPowerOf2_32(Delta) || Delta == 1) - return SDValue(); - - for (unsigned i = Delta; i < NumElts; i++) { - if (i % Delta == 0) { - if (Op->getOperand(i) != ExtValue) - return SDValue(); - } else if (!(isNullConstant(Op->getOperand(i)) || - Op->getOperand(i).isUndef())) - return SDValue(); - } - unsigned EltSize = - Op->getSimpleValueType(0).getScalarSizeInBits(); - unsigned ExtVTSize = EltSize * Delta; - EltType = MVT::getIntegerVT(ExtVTSize); - NumElt = NumElts / Delta; - return ExtValue; -} - /// Attempt to use the vbroadcast instruction to generate a splat value /// from a splat BUILD_VECTOR which uses: /// a. A single scalar load, or a constant. @@ -6747,32 +6709,6 @@ static SDValue lowerBuildVectorAsBroadcast(BuildVectorSDNode *BVOp, assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && "Unsupported vector type for broadcast."); - // Attempt to use VBROADCASTM - // From this paterrn: - // a. t0 = (zext_i64 (bitcast_i8 v2i1 X)) - // b. t1 = (build_vector t0 t0) - // - // Create (VBROADCASTM v2i1 X) - if (Subtarget.hasCDI() && (VT.is512BitVector() || Subtarget.hasVLX())) { - MVT EltType; - unsigned NumElts; - SDValue ZeroExtended = isSplatZeroExtended(BVOp, NumElts, EltType); - if (ZeroExtended && ZeroExtended.getOpcode() == ISD::BITCAST) { - SDValue BOperand = ZeroExtended.getOperand(0); - if (BOperand.getSimpleValueType().getVectorElementType() == MVT::i1) { - if ((EltType == MVT::i64 && - VT.getVectorElementType() == MVT::i8) || // for broadcastmb2q - (EltType == MVT::i32 && - VT.getVectorElementType() == MVT::i16)) { // for broadcastmw2d - SDValue Brdcst = - DAG.getNode(X86ISD::VBROADCASTM, dl, - MVT::getVectorVT(EltType, NumElts), BOperand); - return DAG.getBitcast(VT, Brdcst); - } - } - } - } - BitVector UndefElements; SDValue Ld = BVOp->getSplatValue(&UndefElements); |

