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| author | Hal Finkel <hfinkel@anl.gov> | 2013-04-04 22:55:54 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-04-04 22:55:54 +0000 |
| commit | e5680b3c362666b1b608a11449ef40e6982435f4 (patch) | |
| tree | b35a45d58d8e9cc929075d209080c71665f3d112 /llvm/lib | |
| parent | e20dad645fa1d78cf4331ea296893652eb68b1fd (diff) | |
| download | bcm5719-llvm-e5680b3c362666b1b608a11449ef40e6982435f4.tar.gz bcm5719-llvm-e5680b3c362666b1b608a11449ef40e6982435f4.zip | |
Rename the current PPC BCL definition to BCLalways
BCL is normally a conditional branch-and-link instruction, but has
an unconditional form (which is used in the SjLj code, for example).
To make clear that this BCL instruction definition is specifically
the special unconditional form (which does not meaningfully take
a condition-register input), rename it to BCLalways.
No functionality change intended.
llvm-svn: 178803
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.td | 6 |
3 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 74cc1bb7620..96a9f0a3900 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -914,7 +914,7 @@ EmitFunctionStubs(const MachineModuleInfoMachO::SymbolListTy &Stubs) { // mflr r0 OutStreamer.EmitInstruction(MCInstBuilder(PPC::MFLR).addReg(PPC::R0)); // bcl 20, 31, AnonSymbol - OutStreamer.EmitInstruction(MCInstBuilder(PPC::BCL).addExpr(Anon)); + OutStreamer.EmitInstruction(MCInstBuilder(PPC::BCLalways).addExpr(Anon)); OutStreamer.EmitLabel(AnonSymbol); // mflr r11 OutStreamer.EmitInstruction(MCInstBuilder(PPC::MFLR).addReg(PPC::R11)); diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 8195f5eb050..16fc8a0e372 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -6080,7 +6080,7 @@ PPCTargetLowering::emitEHSjLjSetJmp(MachineInstr *MI, } // Setup - MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::BCL)).addMBB(mainMBB); + MIB = BuildMI(*thisMBB, MI, DL, TII->get(PPC::BCLalways)).addMBB(mainMBB); MIB.addRegMask(PPCRegInfo->getNoPreservedMask()); BuildMI(*thisMBB, MI, DL, TII->get(PPC::LI), restoreDstReg).addImm(1); diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index feca7c03701..ab907622bee 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -524,11 +524,11 @@ let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, PPC970_Unit = 7 in { } } -// The direct BCL used by the SjLj setjmp code. +// The unconditional BCL used by the SjLj setjmp code. let isCall = 1, hasCtrlDep = 1, isCodeGenOnly = 1, PPC970_Unit = 7 in { let Defs = [LR], Uses = [RM] in { - def BCL : BForm_2<16, 20, 31, 0, 1, (outs), (ins condbrtarget:$dst), - "bcl 20, 31, $dst">; + def BCLalways : BForm_2<16, 20, 31, 0, 1, (outs), (ins condbrtarget:$dst), + "bcl 20, 31, $dst">; } } |
