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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-20 06:11:02 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-07-20 06:11:02 +0000 |
commit | e261b6e853c3591e61a9cfdb420e6a8900d14f0d (patch) | |
tree | a2055d8ac83e9b49ca1f7b005a3aa54a06605e64 /llvm/lib | |
parent | 6747c7d01be948d6700a182e5a0ecf8dfb6b8cb3 (diff) | |
download | bcm5719-llvm-e261b6e853c3591e61a9cfdb420e6a8900d14f0d.tar.gz bcm5719-llvm-e261b6e853c3591e61a9cfdb420e6a8900d14f0d.zip |
R600/SI: Remove dead code and add missing tests.
This probably was killed by some generic DAGCombiner
improvements in checking the TargetBooleanContents instead
of just 1.
llvm-svn: 213471
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 86997c82ebe..e6c1614eb27 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -1241,20 +1241,6 @@ SDValue SITargetLowering::PerformDAGCombine(SDNode *N, switch (N->getOpcode()) { default: return AMDGPUTargetLowering::PerformDAGCombine(N, DCI); - case ISD::SELECT_CC: { - ConstantSDNode *True, *False; - // i1 selectcc(l, r, -1, 0, cc) -> i1 setcc(l, r, cc) - if ((True = dyn_cast<ConstantSDNode>(N->getOperand(2))) - && (False = dyn_cast<ConstantSDNode>(N->getOperand(3))) - && True->isAllOnesValue() - && False->isNullValue() - && VT == MVT::i1) { - return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0), - N->getOperand(1), N->getOperand(4)); - - } - break; - } case ISD::SETCC: { SDValue Arg0 = N->getOperand(0); SDValue Arg1 = N->getOperand(1); |