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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-04-17 21:00:01 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-04-17 21:00:01 +0000 |
| commit | e1a244502cdfc28345d59178cf5c81a2e6b0afc1 (patch) | |
| tree | 8f5ca687a60b4a5cba1d8f09fa467284a582af2f /llvm/lib | |
| parent | 153e695ee2f29fac57ab4142dc4caad7b11902b1 (diff) | |
| download | bcm5719-llvm-e1a244502cdfc28345d59178cf5c81a2e6b0afc1.tar.gz bcm5719-llvm-e1a244502cdfc28345d59178cf5c81a2e6b0afc1.zip | |
R600/SI: Legalize operands after changing dst reg in FixSGPRCopies
Otherwise we may not legalize some illegal REG_SEQUENCE instructions.
llvm-svn: 206497
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.cpp b/llvm/lib/Target/R600/SIInstrInfo.cpp index 3e36f27afbd..a235255756f 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.cpp +++ b/llvm/lib/Target/R600/SIInstrInfo.cpp @@ -991,9 +991,8 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { } } - legalizeOperands(Inst); - // Update the destination register class. + const TargetRegisterClass *NewDstRC = getOpRegClass(*Inst, 0); switch (Inst->getOpcode()) { @@ -1019,6 +1018,9 @@ void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { unsigned NewDstReg = MRI.createVirtualRegister(NewDstRC); MRI.replaceRegWith(DstReg, NewDstReg); + // Legalize the operands + legalizeOperands(Inst); + for (MachineRegisterInfo::use_iterator I = MRI.use_begin(NewDstReg), E = MRI.use_end(); I != E; ++I) { MachineInstr &UseMI = *I->getParent(); |
