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| author | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-03 22:50:11 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2006-08-03 22:50:11 +0000 |
| commit | e19f6fde2dbb74779ecd5fb2443fea5d4b326b47 (patch) | |
| tree | 1608274cf189681eb3d59668e57fbfcf76b03ad1 /llvm/lib | |
| parent | c4774271eaabdcde9a0e5f17105747b8cc046996 (diff) | |
| download | bcm5719-llvm-e19f6fde2dbb74779ecd5fb2443fea5d4b326b47.tar.gz bcm5719-llvm-e19f6fde2dbb74779ecd5fb2443fea5d4b326b47.zip | |
Bug fix: always generate a RET_FLAG in LowerRET
fixes ret_null.ll and call.ll
llvm-svn: 29519
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index b299f81c01b..000efaadde1 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -170,7 +170,7 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { abort(); case 1: { SDOperand LR = DAG.getRegister(ARM::R14, MVT::i32); - return DAG.getNode(ISD::BRIND, MVT::Other, Chain, LR); + return DAG.getNode(ARMISD::RET_FLAG, MVT::Other, Chain); } case 3: Copy = DAG.getCopyToReg(Chain, ARM::R0, Op.getOperand(1), SDOperand()); |
