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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 18:40:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 18:40:53 +0000 |
| commit | e14653e17d33853c6f41609f0a69587f6f523d9c (patch) | |
| tree | e253e973933e9c7ac410759b2c3b2d7b4843bc3e /llvm/lib | |
| parent | a45c31a5b40ded42ad2cccc20f927f4e1ce7c125 (diff) | |
| download | bcm5719-llvm-e14653e17d33853c6f41609f0a69587f6f523d9c.tar.gz bcm5719-llvm-e14653e17d33853c6f41609f0a69587f6f523d9c.zip | |
[X86][SSE] Add MINSD/MAXSD/MINSS/MAXSS intrinsic scalar load folding support
These are no different in load behaviour to the existing ADD/SUB/MUL/DIV scalar ops but were missing from isNonFoldablePartialRegisterLoad
llvm-svn: 279652
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index b3fffd7f2a0..60a3d82251e 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -6190,6 +6190,8 @@ static bool isNonFoldablePartialRegisterLoad(const MachineInstr &LoadMI, switch (UserOpc) { case X86::ADDSSrr_Int: case X86::VADDSSrr_Int: case X86::VADDSSZrr_Int: case X86::DIVSSrr_Int: case X86::VDIVSSrr_Int: case X86::VDIVSSZrr_Int: + case X86::MAXSSrr_Int: case X86::VMAXSSrr_Int: case X86::VMAXSSZrr_Int: + case X86::MINSSrr_Int: case X86::VMINSSrr_Int: case X86::VMINSSZrr_Int: case X86::MULSSrr_Int: case X86::VMULSSrr_Int: case X86::VMULSSZrr_Int: case X86::SUBSSrr_Int: case X86::VSUBSSrr_Int: case X86::VSUBSSZrr_Int: case X86::VFMADD132SSr_Int: case X86::VFNMADD132SSr_Int: @@ -6212,6 +6214,8 @@ static bool isNonFoldablePartialRegisterLoad(const MachineInstr &LoadMI, switch (UserOpc) { case X86::ADDSDrr_Int: case X86::VADDSDrr_Int: case X86::VADDSDZrr_Int: case X86::DIVSDrr_Int: case X86::VDIVSDrr_Int: case X86::VDIVSDZrr_Int: + case X86::MAXSDrr_Int: case X86::VMAXSDrr_Int: case X86::VMAXSDZrr_Int: + case X86::MINSDrr_Int: case X86::VMINSDrr_Int: case X86::VMINSDZrr_Int: case X86::MULSDrr_Int: case X86::VMULSDrr_Int: case X86::VMULSDZrr_Int: case X86::SUBSDrr_Int: case X86::VSUBSDrr_Int: case X86::VSUBSDZrr_Int: case X86::VFMADD132SDr_Int: case X86::VFNMADD132SDr_Int: |
