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authorGeoff Berry <gberry@codeaurora.org>2016-11-21 22:51:10 +0000
committerGeoff Berry <gberry@codeaurora.org>2016-11-21 22:51:10 +0000
commite0bf52f3948dd1b6fdac1d08f1fcadf8211970ab (patch)
treeba6362c2ee7656a026a9c6639d75f4aa095315b4 /llvm/lib
parent3e50a5be8f5259bc256f39830e72525dd9f90626 (diff)
downloadbcm5719-llvm-e0bf52f3948dd1b6fdac1d08f1fcadf8211970ab.tar.gz
bcm5719-llvm-e0bf52f3948dd1b6fdac1d08f1fcadf8211970ab.zip
[AArch64LoadStoreOptimizer] Don't treat write to XZR/WZR as a clobber.
Summary: When searching for load/store instructions to pair/merge don't treat writes to WZR/XZR as clobbers since they don't change the value read from WZR/XZR (which is always 0). Reviewers: mcrosier, junbuml, jmolloy, t.p.northover Subscribers: aemerson, llvm-commits, rengolin Differential Revision: https://reviews.llvm.org/D26921 llvm-svn: 287592
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
index 7aed5d65600..6e157638184 100644
--- a/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+++ b/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
@@ -863,8 +863,10 @@ static void trackRegDefsUses(const MachineInstr &MI, BitVector &ModifiedRegs,
if (!Reg)
continue;
if (MO.isDef()) {
- for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
- ModifiedRegs.set(*AI);
+ // WZR/XZR are not modified even when used as a destination register.
+ if (Reg != AArch64::WZR && Reg != AArch64::XZR)
+ for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
+ ModifiedRegs.set(*AI);
} else {
assert(MO.isUse() && "Reg operand not a def and not a use?!?");
for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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