summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorToma Tabacu <toma.tabacu@imgtec.com>2015-05-13 16:02:41 +0000
committerToma Tabacu <toma.tabacu@imgtec.com>2015-05-13 16:02:41 +0000
commitdf7fd46c4a4832a133c498b526ff3db9c61e5742 (patch)
treea6ef438ad6f3e1ef597383daa3a29abf41855875 /llvm/lib
parentf3465e10e9da352436336a66e374656f72c4aa8e (diff)
downloadbcm5719-llvm-df7fd46c4a4832a133c498b526ff3db9c61e5742.tar.gz
bcm5719-llvm-df7fd46c4a4832a133c498b526ff3db9c61e5742.zip
[mips] [IAS] Preemptively fix warning introduced by r237255. NFC.
Some compilers warn about using the ternary operator with an unsigned variable and enum. I haven't seen this trigger in the llvm.org buildbots yet, but it probably will at some point. Reported by Daniel Sanders. llvm-svn: 237262
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp9
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index cdaf1b723d8..9237cdb99a0 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -1740,18 +1740,21 @@ bool MipsAsmParser::loadImmediate(int64_t ImmValue, unsigned DstReg,
if (0 <= ImmValue && ImmValue <= 65535) {
// For unsigned and positive signed 16-bit values (0 <= j <= 65535):
// li d,j => ori d,$zero,j
+ if (!UseSrcReg)
+ SrcReg = isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
tmpInst.setOpcode(Mips::ORi);
tmpInst.addOperand(MCOperand::CreateReg(DstReg));
- tmpInst.addOperand(MCOperand::CreateReg(
- UseSrcReg ? SrcReg : (isGP64bit() ? Mips::ZERO_64 : Mips::ZERO)));
+ tmpInst.addOperand(MCOperand::CreateReg(SrcReg));
tmpInst.addOperand(MCOperand::CreateImm(ImmValue));
Instructions.push_back(tmpInst);
} else if (ImmValue < 0 && ImmValue >= -32768) {
// For negative signed 16-bit values (-32768 <= j < 0):
// li d,j => addiu d,$zero,j
+ if (!UseSrcReg)
+ SrcReg = Mips::ZERO;
tmpInst.setOpcode(Mips::ADDiu);
tmpInst.addOperand(MCOperand::CreateReg(DstReg));
- tmpInst.addOperand(MCOperand::CreateReg(UseSrcReg ? SrcReg : Mips::ZERO));
+ tmpInst.addOperand(MCOperand::CreateReg(SrcReg));
tmpInst.addOperand(MCOperand::CreateImm(ImmValue));
Instructions.push_back(tmpInst);
} else if ((ImmValue & 0xffffffff) == ImmValue) {
OpenPOWER on IntegriCloud