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| author | Evan Cheng <evan.cheng@apple.com> | 2006-09-05 20:32:06 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-09-05 20:32:06 +0000 |
| commit | ddfb10b5afc06bfda4d01803dcdcbfd1796d7a6d (patch) | |
| tree | c7e8a476fe9df20d727a2b1d5afa6cf176eaeba0 /llvm/lib | |
| parent | 26569329797aae62ba14d3ee995dd21c3a3c3e66 (diff) | |
| download | bcm5719-llvm-ddfb10b5afc06bfda4d01803dcdcbfd1796d7a6d.tar.gz bcm5719-llvm-ddfb10b5afc06bfda4d01803dcdcbfd1796d7a6d.zip | |
Only call isUse/isDef on register operands
llvm-svn: 30122
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocLocal.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocLocal.cpp b/llvm/lib/CodeGen/RegAllocLocal.cpp index e3f3ab6fa3f..ffb12c2f94e 100644 --- a/llvm/lib/CodeGen/RegAllocLocal.cpp +++ b/llvm/lib/CodeGen/RegAllocLocal.cpp @@ -552,7 +552,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { for (unsigned i = 0; i != MI->getNumOperands(); ++i) { MachineOperand& MO = MI->getOperand(i); // here we are looking for only used operands (never def&use) - if (!MO.isDef() && MO.isRegister() && MO.getReg() && + if (MO.isRegister() && !MO.isDef() && MO.getReg() && MRegisterInfo::isVirtualRegister(MO.getReg())) MI = reloadVirtReg(MBB, MI, i); } @@ -584,7 +584,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // are defined, and marking explicit destinations in the PhysRegsUsed map. for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand& MO = MI->getOperand(i); - if (MO.isDef() && MO.isRegister() && MO.getReg() && + if (MO.isRegister() && MO.isDef() && MO.getReg() && MRegisterInfo::isPhysicalRegister(MO.getReg())) { unsigned Reg = MO.getReg(); PhysRegsEverUsed[Reg] = true; @@ -626,7 +626,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { MachineOperand& MO = MI->getOperand(i); - if (MO.isDef() && MO.isRegister() && MO.getReg() && + if (MO.isRegister() && MO.isDef() && MO.getReg() && MRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned DestVirtReg = MO.getReg(); unsigned DestPhysReg; |
