diff options
| author | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-03-26 15:38:37 +0000 |
|---|---|---|
| committer | Andrea Di Biagio <Andrea_DiBiagio@sn.scee.net> | 2019-03-26 15:38:37 +0000 |
| commit | ddce32e2f3a009b37eb33a5d455c072cefe1d2a0 (patch) | |
| tree | 3537f3377f8a229c7149999b9079ab81cbac9b96 /llvm/lib | |
| parent | bb7c57d36dd6577090e5feb3b29df73770d961ba (diff) | |
| download | bcm5719-llvm-ddce32e2f3a009b37eb33a5d455c072cefe1d2a0.tar.gz bcm5719-llvm-ddce32e2f3a009b37eb33a5d455c072cefe1d2a0.zip | |
[MCA] Correctly update the UsedResourceGroups mask in the InstrBuilder.
Found by inspection when looking at the debug output of MCA.
This problem was latent, and none of the upstream models were affected by it.
No functional change intended.
llvm-svn: 357000
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/MCA/InstrBuilder.cpp | 1 | ||||
| -rw-r--r-- | llvm/lib/MCA/Stages/DispatchStage.cpp | 10 |
2 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/MCA/InstrBuilder.cpp b/llvm/lib/MCA/InstrBuilder.cpp index e10efb28f77..89904e75cc1 100644 --- a/llvm/lib/MCA/InstrBuilder.cpp +++ b/llvm/lib/MCA/InstrBuilder.cpp @@ -115,6 +115,7 @@ static void initializeUsedResources(InstrDesc &ID, } else { // Remove the leading 1 from the resource group mask. NormalizedMask ^= PowerOf2Floor(NormalizedMask); + UsedResourceGroups |= (A.first ^ NormalizedMask); } for (unsigned J = I + 1; J < E; ++J) { diff --git a/llvm/lib/MCA/Stages/DispatchStage.cpp b/llvm/lib/MCA/Stages/DispatchStage.cpp index ae3d3fd6743..b55ac70307a 100644 --- a/llvm/lib/MCA/Stages/DispatchStage.cpp +++ b/llvm/lib/MCA/Stages/DispatchStage.cpp @@ -25,6 +25,16 @@ namespace llvm { namespace mca { +DispatchStage::DispatchStage(const MCSubtargetInfo &Subtarget, + const MCRegisterInfo &MRI, + unsigned MaxDispatchWidth, RetireControlUnit &R, + RegisterFile &F) + : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth), + CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) { + if (!DispatchWidth) + DispatchWidth = Subtarget.getSchedModel().IssueWidth; +} + void DispatchStage::notifyInstructionDispatched(const InstRef &IR, ArrayRef<unsigned> UsedRegs, unsigned UOps) const { |

