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authorCraig Topper <craig.topper@intel.com>2017-11-28 01:36:33 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-28 01:36:33 +0000
commitddbc340c20495d9add6b2eeab3871a9f8baa098b (patch)
tree13c5b846d48266c4f7bff79c23553e8195938d69 /llvm/lib
parent5befc5bfce4cc7bd39668787381dae92e043506f (diff)
downloadbcm5719-llvm-ddbc340c20495d9add6b2eeab3871a9f8baa098b.tar.gz
bcm5719-llvm-ddbc340c20495d9add6b2eeab3871a9f8baa098b.zip
[X86] Make zero extend from v16i1/v8i1 to v16i8/v8i16/v16i16 not scalarize under AVX512.
llvm-svn: 319136
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index b9381a34a69..a4fe0d4cc91 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1255,9 +1255,13 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
setOperationAction(ISD::ANY_EXTEND, MVT::v8i64, Custom);
setOperationAction(ISD::SIGN_EXTEND, MVT::v16i32, Custom);
setOperationAction(ISD::SIGN_EXTEND, MVT::v8i64, Custom);
+
setOperationAction(ISD::SIGN_EXTEND, MVT::v16i8, Custom);
+ setOperationAction(ISD::ZERO_EXTEND, MVT::v16i8, Custom);
setOperationAction(ISD::SIGN_EXTEND, MVT::v8i16, Custom);
+ setOperationAction(ISD::ZERO_EXTEND, MVT::v8i16, Custom);
setOperationAction(ISD::SIGN_EXTEND, MVT::v16i16, Custom);
+ setOperationAction(ISD::ZERO_EXTEND, MVT::v16i16, Custom);
for (auto VT : { MVT::v16f32, MVT::v8f64 }) {
setOperationAction(ISD::FFLOOR, VT, Legal);
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