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author | Craig Topper <craig.topper@intel.com> | 2019-02-15 21:59:33 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2019-02-15 21:59:33 +0000 |
commit | db2f084aa9dc062f95c9d630be9acfa7b8394b35 (patch) | |
tree | e84896e61d77c9e7952ee268ac3e4ef737f8711f /llvm/lib | |
parent | 1c29801615427fe07927f1179ee017e2351c09e0 (diff) | |
download | bcm5719-llvm-db2f084aa9dc062f95c9d630be9acfa7b8394b35.tar.gz bcm5719-llvm-db2f084aa9dc062f95c9d630be9acfa7b8394b35.zip |
[X86] Don't set exception mask bits when modifying FPCW to change rounding mode for fp->int conversion
When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption.
This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block)
Differential Revision: https://reviews.llvm.org/D57788
llvm-svn: 354178
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 38 |
1 files changed, 24 insertions, 14 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 54e8251d7c3..ec77865e702 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -30103,27 +30103,37 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, case X86::FP80_TO_INT64_IN_MEM: { // Change the floating point control register to use "round towards zero" // mode when truncating to an integer value. - int CWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false); + int OrigCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false); addFrameReference(BuildMI(*BB, MI, DL, - TII->get(X86::FNSTCW16m)), CWFrameIdx); + TII->get(X86::FNSTCW16m)), OrigCWFrameIdx); - // Load the old value of the high byte of the control word... + // Load the old value of the control word... unsigned OldCW = + MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass); + addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOVZX32rm16), OldCW), + OrigCWFrameIdx); + + // OR 0b11 into bit 10 and 11. 0b11 is the encoding for round toward zero. + unsigned NewCW = + MF->getRegInfo().createVirtualRegister(&X86::GR32RegClass); + BuildMI(*BB, MI, DL, TII->get(X86::OR32ri), NewCW) + .addReg(OldCW, RegState::Kill).addImm(0xC00); + + // Extract to 16 bits. + unsigned NewCW16 = MF->getRegInfo().createVirtualRegister(&X86::GR16RegClass); - addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16rm), OldCW), - CWFrameIdx); + BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), NewCW16) + .addReg(NewCW, RegState::Kill, X86::sub_16bit); - // Set the high part to be round to zero... - addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mi)), CWFrameIdx) - .addImm(0xC7F); + // Prepare memory for FLDCW. + int NewCWFrameIdx = MF->getFrameInfo().CreateStackObject(2, 2, false); + addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)), + NewCWFrameIdx) + .addReg(NewCW16, RegState::Kill); // Reload the modified control word now... addFrameReference(BuildMI(*BB, MI, DL, - TII->get(X86::FLDCW16m)), CWFrameIdx); - - // Restore the memory image of control word to original value - addFrameReference(BuildMI(*BB, MI, DL, TII->get(X86::MOV16mr)), CWFrameIdx) - .addReg(OldCW); + TII->get(X86::FLDCW16m)), NewCWFrameIdx); // Get the X86 opcode to use. unsigned Opc; @@ -30146,7 +30156,7 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, // Reload the original control word now. addFrameReference(BuildMI(*BB, MI, DL, - TII->get(X86::FLDCW16m)), CWFrameIdx); + TII->get(X86::FLDCW16m)), OrigCWFrameIdx); MI.eraseFromParent(); // The pseudo instruction is gone now. return BB; |