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| author | Sanjay Patel <spatel@rotateright.com> | 2015-08-31 20:27:03 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-08-31 20:27:03 +0000 |
| commit | d9a5c225d14dfa3c98bc81675edd2cea4caed03f (patch) | |
| tree | 3e404836da5c3ac97ec52091713482d68817d1b1 /llvm/lib | |
| parent | 058f3432463b73863616b29dbbf00cadd7e463a1 (diff) | |
| download | bcm5719-llvm-d9a5c225d14dfa3c98bc81675edd2cea4caed03f.tar.gz bcm5719-llvm-d9a5c225d14dfa3c98bc81675edd2cea4caed03f.zip | |
[x86] enable machine combiner reassociations for scalar 'or' insts
llvm-svn: 246481
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index be4f6c72320..7a37d4ce926 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -6397,6 +6397,10 @@ static bool isAssociativeAndCommutative(const MachineInstr &Inst) { case X86::AND16rr: case X86::AND32rr: case X86::AND64rr: + case X86::OR8rr: + case X86::OR16rr: + case X86::OR32rr: + case X86::OR64rr: case X86::IMUL16rr: case X86::IMUL32rr: case X86::IMUL64rr: |
