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authorMomchil Velikov <momchil.velikov@arm.com>2019-11-06 10:58:43 +0000
committerMomchil Velikov <momchil.velikov@arm.com>2019-11-06 12:46:50 +0000
commitd91ea7fc6fd0cdd530e63c24db1d45253e1fdfdb (patch)
tree2161f6d5a5915e9489e2eb6354352a58601e96f5 /llvm/lib
parent63f08a59c8942e99d71cfef21cfc050b6f3d6d52 (diff)
downloadbcm5719-llvm-d91ea7fc6fd0cdd530e63c24db1d45253e1fdfdb.tar.gz
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[AArch64] Move the branch relaxation pass after BTI insertion
Summary: Inserting BTI instructions can push branch destinations out of range. The branch relaxation pass itself cannot insert indirect branches since `TargetInstrInfo::insertIndirecrtBranch` is not implemented for AArch64 (guess +/-128 MB direct branch range is more than enough in practice). Testing this is a bit tricky. The original test case we have is 155kloc/6.1M. I've generated a test case using this program: ``` int main() { std::cout << R"src(int test(); void g0(), g1(), g2(), g3(), g4(), e(); void f(int v) { if ((test() & 2) == 0) { switch (v) { case 0: g0(); case 1: g1(); case 2: g2(); case 3: g3(); } )src"; const int N = 8176; for (int i = 0; i < N; ++i) std::cout << " void h" << i << "();\n"; for (int i = 0; i < N; ++i) std::cout << " h" << i << "();\n"; std::cout << R"src( } else { e(); } } )src"; } ``` which is still a bit too much to commit as a regression test, IMHO. Reviewers: t.p.northover, ostannard Reviewed By: ostannard Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69118 Change-Id: Ide5c922bcde08ff4cf635da5e52365525a997a0a
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AArch64/AArch64TargetMachine.cpp7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 0ec1e667d69..4101d0abad9 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -614,14 +614,15 @@ void AArch64PassConfig::addPreEmitPass() {
if (EnableA53Fix835769)
addPass(createAArch64A53Fix835769());
+
+ if (EnableBranchTargets)
+ addPass(createAArch64BranchTargetsPass());
+
// Relax conditional branch instructions if they're otherwise out of
// range of their destination.
if (BranchRelaxation)
addPass(&BranchRelaxationPassID);
- if (EnableBranchTargets)
- addPass(createAArch64BranchTargetsPass());
-
// Identify valid longjmp targets for Windows Control Flow Guard.
if (TM->getTargetTriple().isOSWindows())
addPass(createCFGuardLongjmpPass());
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