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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-03-08 00:48:46 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-03-08 00:48:46 +0000 |
commit | d8ed207a20df6bd1d29dd86d806181be7fc94e76 (patch) | |
tree | 9cd185ad121b5ab0c5a265cb33a733d3cb2b47a5 /llvm/lib | |
parent | f9b41cd3d8437652b2d08504b5ab3eb671df1bb7 (diff) | |
download | bcm5719-llvm-d8ed207a20df6bd1d29dd86d806181be7fc94e76.tar.gz bcm5719-llvm-d8ed207a20df6bd1d29dd86d806181be7fc94e76.zip |
AMDGPU: Constant fold rcp node
When doing arcp optimization with a constant denominator,
this was leaving behind rcps with constant inputs.
llvm-svn: 297248
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index edaab0063da..41a4f762018 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -1295,8 +1295,8 @@ SDValue AMDGPUTargetLowering::LowerDIVREM24(SDValue Op, SelectionDAG &DAG, SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq); // float fr = mad(fqneg, fb, fa); - unsigned OpCode = Subtarget->hasFP32Denormals() ? - (unsigned)AMDGPUISD::FMAD_FTZ : + unsigned OpCode = Subtarget->hasFP32Denormals() ? + (unsigned)AMDGPUISD::FMAD_FTZ : (unsigned)ISD::FMAD; SDValue fr = DAG.getNode(OpCode, DL, FltVT, fqneg, fb, fa); @@ -3351,6 +3351,16 @@ SDValue AMDGPUTargetLowering::PerformDAGCombine(SDNode *N, return performStoreCombine(N, DCI); case AMDGPUISD::CLAMP: return performClampCombine(N, DCI); + case AMDGPUISD::RCP: { + if (const auto *CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0))) { + // XXX - Should this flush denormals? + const APFloat &Val = CFP->getValueAPF(); + APFloat One(Val.getSemantics(), "1.0"); + return DAG.getConstantFP(One / Val, SDLoc(N), N->getValueType(0)); + } + + break; + } } return SDValue(); } |