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| author | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:10:35 +0000 |
|---|---|---|
| committer | Anton Korobeynikov <asl@math.spbu.ru> | 2009-07-16 14:10:35 +0000 |
| commit | d8458e6c09ce43607b5c4258ece3114ebdb3fe02 (patch) | |
| tree | 1a63a1dbe5c9a30e35281f1f2f63f4d102beb845 /llvm/lib | |
| parent | 1eb6262b4b12d402472a0b04ec0a9af860b45dad (diff) | |
| download | bcm5719-llvm-d8458e6c09ce43607b5c4258ece3114ebdb3fe02.tar.gz bcm5719-llvm-d8458e6c09ce43607b5c4258ece3114ebdb3fe02.zip | |
Typos
llvm-svn: 75991
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp index d1bd2d64777..fb0c5dc42d3 100644 --- a/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp +++ b/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp @@ -312,7 +312,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM) { // Is the base register already occupied? if (AM.BaseType != SystemZRRIAddressMode::RegBase || AM.Base.Reg.getNode()) { - // If so, check to see if the scale register is set. + // If so, check to see if the index register is set. if (AM.IndexReg.getNode() == 0 && !AM.isRI) { AM.IndexReg = N; return false; @@ -439,7 +439,7 @@ bool SystemZDAGToDAGISel::SelectAddrRI(SDValue Op, SDValue& Addr, /// index register plus an unsigned 12-bit displacement [base + idx + imm]. bool SystemZDAGToDAGISel::SelectAddrRRI12(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp, SDValue &Index) { - SystemZRRIAddressMode AM20(/*isRI*/true), AM12(/*isRI*/true); + SystemZRRIAddressMode AM20, AM12; bool Done = false; if (!Addr.hasOneUse()) { |
