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author | Amara Emerson <aemerson@apple.com> | 2017-11-30 20:06:02 +0000 |
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committer | Amara Emerson <aemerson@apple.com> | 2017-11-30 20:06:02 +0000 |
commit | d78d65c2a4eed16b273c214d24f5d5f55ce31d52 (patch) | |
tree | cff9262ba11c2ab5cf3994dfb4e274c3835fc767 /llvm/lib | |
parent | 9750f662f70de69cb7b618e4477e30d6d3adb267 (diff) | |
download | bcm5719-llvm-d78d65c2a4eed16b273c214d24f5d5f55ce31d52.tar.gz bcm5719-llvm-d78d65c2a4eed16b273c214d24f5d5f55ce31d52.zip |
[GlobalISel][IRTranslator] Fix crash during translation of zero sized loads/stores/args/returns.
This fixes PR35358.
rdar://35619533
Differential Revision: https://reviews.llvm.org/D40604
llvm-svn: 319465
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 13 | ||||
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 2 |
2 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp index 99251bb23b1..e911085d0ad 100644 --- a/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp +++ b/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp @@ -238,6 +238,8 @@ bool IRTranslator::translateCompare(const User &U, bool IRTranslator::translateRet(const User &U, MachineIRBuilder &MIRBuilder) { const ReturnInst &RI = cast<ReturnInst>(U); const Value *Ret = RI.getReturnValue(); + if (Ret && DL->getTypeStoreSize(Ret->getType()) == 0) + Ret = nullptr; // The target may mess up with the insertion point, but // this is not important as a return is the last instruction // of the block anyway. @@ -337,6 +339,9 @@ bool IRTranslator::translateLoad(const User &U, MachineIRBuilder &MIRBuilder) { : MachineMemOperand::MONone; Flags |= MachineMemOperand::MOLoad; + if (DL->getTypeStoreSize(LI.getType()) == 0) + return true; + unsigned Res = getOrCreateVReg(LI); unsigned Addr = getOrCreateVReg(*LI.getPointerOperand()); @@ -355,6 +360,9 @@ bool IRTranslator::translateStore(const User &U, MachineIRBuilder &MIRBuilder) { : MachineMemOperand::MONone; Flags |= MachineMemOperand::MOStore; + if (DL->getTypeStoreSize(SI.getValueOperand()->getType()) == 0) + return true; + unsigned Val = getOrCreateVReg(*SI.getValueOperand()); unsigned Addr = getOrCreateVReg(*SI.getPointerOperand()); @@ -1269,8 +1277,11 @@ bool IRTranslator::runOnMachineFunction(MachineFunction &CurMF) { // Lower the actual args into this basic block. SmallVector<unsigned, 8> VRegArgs; - for (const Argument &Arg: F.args()) + for (const Argument &Arg: F.args()) { + if (DL->getTypeStoreSize(Arg.getType()) == 0) + continue; // Don't handle zero sized types. VRegArgs.push_back(getOrCreateVReg(Arg)); + } if (!CLI->lowerFormalArguments(EntryBuilder, F, VRegArgs)) { OptimizationRemarkMissed R("gisel-irtranslator", "GISelFailure", MF->getFunction()->getSubprogram(), diff --git a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp index 5cc8881d1c1..838305858ea 100644 --- a/llvm/lib/Target/AArch64/AArch64CallLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64CallLowering.cpp @@ -259,6 +259,8 @@ bool AArch64CallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder, SmallVector<ArgInfo, 8> SplitArgs; unsigned i = 0; for (auto &Arg : F.args()) { + if (DL.getTypeStoreSize(Arg.getType()) == 0) + continue; ArgInfo OrigArg{VRegs[i], Arg.getType()}; setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, F); bool Split = false; |