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authorPreston Gurd <preston.gurd@intel.com>2013-03-27 23:16:18 +0000
committerPreston Gurd <preston.gurd@intel.com>2013-03-27 23:16:18 +0000
commitd6be4bf87f330189f772962f66faefe6ccbd843a (patch)
treef4836b2280080bd2431ac1a1c6dadbde87011298 /llvm/lib
parent8cd208e39ca4c8717d5ef340154b3e591cb020bd (diff)
downloadbcm5719-llvm-d6be4bf87f330189f772962f66faefe6ccbd843a.tar.gz
bcm5719-llvm-d6be4bf87f330189f772962f66faefe6ccbd843a.zip
This patch follows is a follow up to r178171, which uses the register
form of call in preference to memory indirect on Atom. In this case, the patch applies the optimization to the code for reloading spilled registers. The patch also includes changes to sibcall.ll and movgs.ll, which were failing on the Atom buildbot after the first patch was applied. This patch by Sriram Murali. llvm-svn: 178193
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp9
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 17714acd86c..7ba542c8752 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3655,7 +3655,16 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
const SmallVectorImpl<MachineOperand> &MOs,
unsigned Size, unsigned Align) const {
const DenseMap<unsigned, std::pair<unsigned,unsigned> > *OpcodeTablePtr = 0;
+ bool isCallRegIndirect = TM.getSubtarget<X86Subtarget>().callRegIndirect();
bool isTwoAddrFold = false;
+
+ // Atom favors register form of call. So, we do not fold loads into calls
+ // when X86Subtarget is Atom.
+ if (isCallRegIndirect &&
+ (MI->getOpcode() == X86::CALL32r || MI->getOpcode() == X86::CALL64r)) {
+ return NULL;
+ }
+
unsigned NumOps = MI->getDesc().getNumOperands();
bool isTwoAddr = NumOps > 1 &&
MI->getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1;
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