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authorAkira Hatanaka <ahatanaka@mips.com>2013-07-31 00:57:41 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2013-07-31 00:57:41 +0000
commitd6445686a9a723e02b0584dc00951e16512e7484 (patch)
tree2df68b2ccc63960599f3d360091107c0fa2735fe /llvm/lib
parentf8fff213d5e700ec8aa4c556f0751cb4b35991b1 (diff)
downloadbcm5719-llvm-d6445686a9a723e02b0584dc00951e16512e7484.tar.gz
bcm5719-llvm-d6445686a9a723e02b0584dc00951e16512e7484.zip
[mips] Rename instruction DANDi to ANDi64.
No functionality change. llvm-svn: 187469
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Mips/Mips64InstrInfo.td8
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td
index 346cf1e911e..16a059fb554 100644
--- a/llvm/lib/Target/Mips/Mips64InstrInfo.td
+++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td
@@ -81,13 +81,13 @@ def DADDi : ArithLogicI<"daddi", simm16_64, CPU64RegsOpnd>, ADDI_FM<0x18>;
def DADDiu : ArithLogicI<"daddiu", simm16_64, CPU64RegsOpnd, IIArith,
immSExt16, add>,
ADDI_FM<0x19>, IsAsCheapAsAMove;
-def DANDi : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
- and>,
- ADDI_FM<0xc>;
def SLTi64 : SetCC_I<"slti", setlt, simm16_64, immSExt16, CPU64Regs>,
SLTI_FM<0xa>;
def SLTiu64 : SetCC_I<"sltiu", setult, simm16_64, immSExt16, CPU64Regs>,
SLTI_FM<0xb>;
+def ANDi64 : ArithLogicI<"andi", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
+ and>,
+ ADDI_FM<0xc>;
def ORi64 : ArithLogicI<"ori", uimm16_64, CPU64RegsOpnd, IILogic, immZExt16,
or>,
ADDI_FM<0xd>;
@@ -338,7 +338,7 @@ def : InstAlias<"move $dst, $src",
(DADDu CPU64RegsOpnd:$dst, CPU64RegsOpnd:$src, ZERO_64), 1>,
Requires<[HasMips64]>;
def : InstAlias<"and $rs, $rt, $imm",
- (DANDi CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm),
+ (ANDi64 CPU64RegsOpnd:$rs, CPU64RegsOpnd:$rt, uimm16_64:$imm),
1>,
Requires<[HasMips64]>;
def : InstAlias<"slt $rs, $rt, $imm",
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