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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-28 19:12:58 +0000 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-04-28 19:12:58 +0000 |
commit | d5cc753b6da0d03868a5453319079588442a86c1 (patch) | |
tree | 50195a1e713caae8a4a6ee58cabc4fc7bd66e0fa /llvm/lib | |
parent | a1f420de8cffc03196a4902418f768ecb65a3934 (diff) | |
download | bcm5719-llvm-d5cc753b6da0d03868a5453319079588442a86c1.tar.gz bcm5719-llvm-d5cc753b6da0d03868a5453319079588442a86c1.zip |
[X86][SSE] combineExtractVectorElt - add early-out to return zero/undef for out-of-range extraction indices.
llvm-svn: 359406
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 32e3a80d5c7..c120ec1079f 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -34838,9 +34838,11 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG, SDLoc dl(InputVector); bool IsPextr = N->getOpcode() != ISD::EXTRACT_VECTOR_ELT; + if (CIdx && CIdx->getAPIntValue().uge(SrcVT.getVectorNumElements())) + return IsPextr ? DAG.getConstant(0, dl, VT) : DAG.getUNDEF(VT); + // Integer Constant Folding. - if (VT.isInteger() && CIdx && - CIdx->getAPIntValue().ult(SrcVT.getVectorNumElements())) { + if (CIdx && VT.isInteger()) { APInt UndefVecElts; SmallVector<APInt, 16> EltBits; unsigned VecEltBitWidth = SrcVT.getScalarSizeInBits(); |