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| author | Chris Lattner <sabre@nondot.org> | 2004-03-31 22:22:36 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2004-03-31 22:22:36 +0000 |
| commit | d55509c281d41adac998022f4de328508c6d74e5 (patch) | |
| tree | 777e96c44fa0f3d75edfc81195c1958c5bc7c1a9 /llvm/lib | |
| parent | a4b15f04c6eda0153b7d1a934b8a5ba00f591d57 (diff) | |
| download | bcm5719-llvm-d55509c281d41adac998022f4de328508c6d74e5.tar.gz bcm5719-llvm-d55509c281d41adac998022f4de328508c6d74e5.zip | |
Generate slightly smaller code, "test R, R" instead of "cmp R, 0"
llvm-svn: 12579
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/InstSelectSimple.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/InstSelectSimple.cpp b/llvm/lib/Target/X86/InstSelectSimple.cpp index e60aed3c8aa..8d1b57d681d 100644 --- a/llvm/lib/Target/X86/InstSelectSimple.cpp +++ b/llvm/lib/Target/X86/InstSelectSimple.cpp @@ -1015,8 +1015,7 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB, CondReg = X86::BL; } - // FIXME: Should generate a 'tst r, r' - BuildMI(*MBB, IP, X86::CMP8ri, 2).addReg(CondReg).addImm(0); + BuildMI(*MBB, IP, X86::TEST8rr, 2).addReg(CondReg).addReg(CondReg); Opcode = X86::FCMOVE; } break; @@ -1047,8 +1046,7 @@ void ISel::emitSelectOperation(MachineBasicBlock *MBB, } else { // Get the value being branched on, and use it to set the condition codes. unsigned CondReg = getReg(Cond, MBB, IP); - // FIXME: Should generate a 'tst r, r' - BuildMI(*MBB, IP, X86::CMP8ri, 2).addReg(CondReg).addImm(0); + BuildMI(*MBB, IP, X86::TEST8rr, 2).addReg(CondReg).addReg(CondReg); switch (SelectClass) { default: assert(0 && "Unknown value class!"); case cFP: Opcode = X86::FCMOVE; break; @@ -1209,7 +1207,7 @@ void ISel::visitBranchInst(BranchInst &BI) { // Nope, cannot fold setcc into this branch. Emit a branch on a condition // computed some other way... unsigned condReg = getReg(BI.getCondition()); - BuildMI(BB, X86::CMP8ri, 2).addReg(condReg).addImm(0); + BuildMI(BB, X86::TEST8rr, 2).addReg(condReg).addReg(condReg); if (BI.getSuccessor(1) == NextBB) { if (BI.getSuccessor(0) != NextBB) BuildMI(BB, X86::JNE, 1).addPCDisp(BI.getSuccessor(0)); |
