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| author | Evan Cheng <evan.cheng@apple.com> | 2006-11-08 02:38:55 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-11-08 02:38:55 +0000 |
| commit | d48f7dd2504e24db1f4f63bcf1d758016a7c4b29 (patch) | |
| tree | 560f9f6fc955519a51ac4c9bf7809c9dbb0b8fe7 /llvm/lib | |
| parent | a801fcedd33dfb301226f583e914be50a96f5238 (diff) | |
| download | bcm5719-llvm-d48f7dd2504e24db1f4f63bcf1d758016a7c4b29.tar.gz bcm5719-llvm-d48f7dd2504e24db1f4f63bcf1d758016a7c4b29.zip | |
Fix a obscure post-indexed load / store dag combine bug.
llvm-svn: 31537
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index dfa469494f9..d8e2027d11a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -338,7 +338,7 @@ namespace { SDOperand Offset; ISD::MemOpAddrMode AM = ISD::UNINDEXED; if (TLI.getPostIndexedAddressParts(Op, VT, BasePtr, Offset, AM,DAG) && - BasePtr.Val == Ptr.Val) { + BasePtr == Ptr) { // Try turning it into a post-indexed load / store except when // 1) Op must be independent of N, i.e. Op is neither a predecessor // nor a successor of N. Otherwise, if Op is folded that would |
