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authorCraig Topper <craig.topper@intel.com>2019-08-22 08:18:45 +0000
committerCraig Topper <craig.topper@intel.com>2019-08-22 08:18:45 +0000
commitd420616313a3b4bc95a9effa00363cf3ad953e61 (patch)
treeaf44c151b70470b7281e445277446637db714eda /llvm/lib
parent1b30ea2c504432bf2d2164ae3882137a43162e07 (diff)
downloadbcm5719-llvm-d420616313a3b4bc95a9effa00363cf3ad953e61.tar.gz
bcm5719-llvm-d420616313a3b4bc95a9effa00363cf3ad953e61.zip
[X86] Lower the cost of v2i32->v2f64 sint_to_fp under vector widening legalization.
I don't really understand the costs we're using for fp_to_sint, but prior to widening legalization we used 20 as the cost for this via the v2i64->v2f64 entry. That number seems better than the 40 we got with widening legalization. So now we need either a v2i32->v2f64 entry or a v4i32->v2f64 entry depending on whether AVX is enabled or not since we skip the first SSE2 table look up under AVX. llvm-svn: 369628
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86TargetTransformInfo.cpp18
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 1181181a3c5..1e8f1b31214 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -1568,6 +1568,11 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
{ ISD::UINT_TO_FP, MVT::f64, MVT::i64, 4 },
};
+ static const TypeConversionCostTblEntry SSE2ConversionTblWide[] = {
+ { ISD::SINT_TO_FP, MVT::v2f64, MVT::v4i32, 2*10 },
+ { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i32, 2*10 },
+ };
+
static const TypeConversionCostTblEntry SSE2ConversionTbl[] = {
// These are somewhat magic numbers justified by looking at the output of
// Intel's IACA, running some kernels and making sure when we take
@@ -1633,6 +1638,13 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
std::pair<int, MVT> LTSrc = TLI->getTypeLegalizationCost(DL, Src);
std::pair<int, MVT> LTDest = TLI->getTypeLegalizationCost(DL, Dst);
+ if (ST->hasSSE2() && !ST->hasAVX() &&
+ ExperimentalVectorWideningLegalization) {
+ if (const auto *Entry = ConvertCostTableLookup(SSE2ConversionTblWide, ISD,
+ LTDest.second, LTSrc.second))
+ return LTSrc.first * Entry->Cost;
+ }
+
if (ST->hasSSE2() && !ST->hasAVX()) {
if (const auto *Entry = ConvertCostTableLookup(SSE2ConversionTbl, ISD,
LTDest.second, LTSrc.second))
@@ -1705,6 +1717,12 @@ int X86TTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
return Entry->Cost;
}
+ if (ST->hasSSE2() && ExperimentalVectorWideningLegalization) {
+ if (const auto *Entry = ConvertCostTableLookup(SSE2ConversionTblWide, ISD,
+ SimpleDstTy, SimpleSrcTy))
+ return Entry->Cost;
+ }
+
if (ST->hasSSE2()) {
if (const auto *Entry = ConvertCostTableLookup(SSE2ConversionTbl, ISD,
SimpleDstTy, SimpleSrcTy))
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