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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-14 21:19:17 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-14 21:19:17 +0000 |
| commit | d37d2025e92dc7b0b869af73a0dc908bdc968bb2 (patch) | |
| tree | 245372fb7b0d1250a63135566ba3f9a1f0dfde7e /llvm/lib | |
| parent | e787813e16fea06e23c4b89871101458501317a5 (diff) | |
| download | bcm5719-llvm-d37d2025e92dc7b0b869af73a0dc908bdc968bb2.tar.gz bcm5719-llvm-d37d2025e92dc7b0b869af73a0dc908bdc968bb2.zip | |
ARM MCR/MCR2 assembly parsing operand constraints.
The immediate operands are restricted to 0-7. Enforce that when parsing
assembly.
llvm-svn: 135189
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrThumb2.td | 8 |
2 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index b6df3ba110b..28c0318e02b 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -3649,8 +3649,8 @@ class MovRCopro<string opc, bit direction, dag oops, dag iops, def MCR : MovRCopro<"mcr", 0 /* from ARM core register to coprocessor */, (outs), - (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, c_imm:$CRn, - c_imm:$CRm, i32imm:$opc2), + (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, + c_imm:$CRm, imm0_7:$opc2), [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, imm:$CRm, imm:$opc2)]>; def MRC : MovRCopro<"mrc", 1 /* from coprocessor to ARM core register */, @@ -3686,8 +3686,8 @@ class MovRCopro2<string opc, bit direction, dag oops, dag iops, def MCR2 : MovRCopro2<"mcr2", 0 /* from ARM core register to coprocessor */, (outs), - (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, c_imm:$CRn, - c_imm:$CRm, i32imm:$opc2), + (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, + c_imm:$CRm, imm0_7:$opc2), [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, imm:$CRm, imm:$opc2)]>; def MRC2 : MovRCopro2<"mrc2", 1 /* from coprocessor to ARM core register */, diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td index e871412275e..b68314a7ebe 100644 --- a/llvm/lib/Target/ARM/ARMInstrThumb2.td +++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td @@ -3377,13 +3377,13 @@ class t2MovRRCopro<bits<4> Op, string opc, bit direction, /* from ARM core register to coprocessor */ def t2MCR : t2MovRCopro<0b1110, "mcr", 0, (outs), - (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, c_imm:$CRn, - c_imm:$CRm, i32imm:$opc2), + (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, + c_imm:$CRm, imm0_7:$opc2), [(int_arm_mcr imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, imm:$CRm, imm:$opc2)]>; def t2MCR2 : t2MovRCopro<0b1111, "mcr2", 0, - (outs), (ins p_imm:$cop, i32imm:$opc1, GPR:$Rt, c_imm:$CRn, - c_imm:$CRm, i32imm:$opc2), + (outs), (ins p_imm:$cop, imm0_7:$opc1, GPR:$Rt, c_imm:$CRn, + c_imm:$CRm, imm0_7:$opc2), [(int_arm_mcr2 imm:$cop, imm:$opc1, GPR:$Rt, imm:$CRn, imm:$CRm, imm:$opc2)]>; |
