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| author | Evandro Menezes <e.menezes@samsung.com> | 2017-07-26 21:28:15 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2017-07-26 21:28:15 +0000 |
| commit | d192a8ae7dcedfeb0086f59e8c27e46e058170c5 (patch) | |
| tree | 4d548e15a0adf27b70bd199bbc77a3ac450188d5 /llvm/lib | |
| parent | 23f64d229bf1e7e102d7cad64039c44ec835da1f (diff) | |
| download | bcm5719-llvm-d192a8ae7dcedfeb0086f59e8c27e46e058170c5.tar.gz bcm5719-llvm-d192a8ae7dcedfeb0086f59e8c27e46e058170c5.zip | |
[AArch64] Adjust the cost model for Exynos M1 and M2
Add the information for the scalar reciprocal square root approximation.
llvm-svn: 309183
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedM1.td | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedM1.td b/llvm/lib/Target/AArch64/AArch64SchedM1.td index 739fbcf4472..708ccdf3d02 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedM1.td +++ b/llvm/lib/Target/AArch64/AArch64SchedM1.td @@ -380,7 +380,9 @@ def : InstRW<[M1WriteFCVT3], (instregex "^FCVT[DS][DS]r")>; def : InstRW<[M1WriteNEONF], (instregex "^[FSU]CVT[AMNPZ][SU](_Int)?[SU]?[XW]?[DS]?[rds]i?")>; def : InstRW<[M1WriteNEONE], (instregex "^[SU]CVTF[SU]")>; def : InstRW<[M1WriteNALU1], (instregex "^FMOV[DS][ir]")>; -def : InstRW<[M1WriteNMISC1], (instregex "^FRECPXv")>; +def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev1")>; +def : InstRW<[M1WriteNMISC1], (instregex "^FRECPXv1")>; +def : InstRW<[M1WriteFMAC5], (instregex "^F(RECP|RSQRT)S(16|32|64)")>; def : InstRW<[M1WriteS4], (instregex "^FMOV[WX][DS](High)?r")>; def : InstRW<[M1WriteNEONI], (instregex "^FMOV[DS][WX](High)?r")>; @@ -446,7 +448,7 @@ def : InstRW<[M1WriteNALU1], (instregex "^CPY")>; def : InstRW<[M1WriteNALU1], (instregex "^INSv.+lane")>; def : InstRW<[M1WriteNALU1], (instregex "^MOVI[Dv]")>; def : InstRW<[M1WriteNALU1], (instregex "^FMOVv")>; -def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev")>; +def : InstRW<[M1WriteFCVT4], (instregex "^[FU](RECP|RSQRT)Ev[248]")>; def : InstRW<[M1WriteFMAC5], (instregex "^F(RECP|RSQRT)Sv")>; def : InstRW<[M1WriteNALU1], (instregex "^REV(16|32|64)v")>; def : InstRW<[M1WriteNAL11], (instregex "^TB[LX]v8i8One")>; |
