diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2011-11-07 19:01:49 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2011-11-07 19:01:49 +0000 |
| commit | cf7e5b0976f2b03a4317f52291f11e560eb58bbc (patch) | |
| tree | 3dd85f743944c4a8206e46e57ef3fa9bbc1203d5 /llvm/lib | |
| parent | 770f0646dbce9c429beee5f8703d272b4d9450ec (diff) | |
| download | bcm5719-llvm-cf7e5b0976f2b03a4317f52291f11e560eb58bbc.tar.gz bcm5719-llvm-cf7e5b0976f2b03a4317f52291f11e560eb58bbc.zip | |
Fix patterns for unaligned 32-bit load. DSLL32 or DSRL32 should be emitted
when shift amount is larger than 32.
llvm-svn: 143990
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips64InstrInfo.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/Mips64InstrInfo.td b/llvm/lib/Target/Mips/Mips64InstrInfo.td index 83bd7b88c59..1e8bf702421 100644 --- a/llvm/lib/Target/Mips/Mips64InstrInfo.td +++ b/llvm/lib/Target/Mips/Mips64InstrInfo.td @@ -155,9 +155,9 @@ def : Pat<(i64 immZExt16:$in), (ORi64 ZERO_64, imm:$in)>; // zextloadi32_u -def : Pat<(zextloadi32_u addr:$a), (DSRL (DSLL (ULW64_P8 addr:$a), 32), 32)>, +def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64_P8 addr:$a), 0), 0)>, Requires<[IsN64]>; -def : Pat<(zextloadi32_u addr:$a), (DSRL (DSLL (ULW64 addr:$a), 32), 32)>, +def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64 addr:$a), 0), 0)>, Requires<[NotN64]>; // hi/lo relocs |
