Expose base opcode

llvm-svn: 4742

2 files changed, 20 insertions, 0 deletions

diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index c4785e7346c..fa3537c6482 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -25,3 +25,16 @@ X86InstrInfo::X86InstrInfo()
 }
 
 
+static unsigned char BaseOpcodes[] = {
+#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS) BASEOPCODE,
+#include "X86InstrInfo.def"
+};
+
+// getBaseOpcodeFor - This function returns the "base" X86 opcode for the
+// specified opcode number.
+//
+unsigned char X86InstrInfo::getBaseOpcodeFor(unsigned Opcode) const {
+  assert(Opcode < sizeof(BaseOpcodes)/sizeof(BaseOpcodes[0]) &&
+         "Opcode out of range!");
+  return BaseOpcodes[Opcode];
+}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 415d81a05cf..65536818bf0 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -54,6 +54,7 @@ namespace X86II {
   
     /// TODO: Mod/RM that uses a fixed opcode extension, like /0
 
+    FormMask       = 7,
 
     //===------------------------------------------------------------------===//
     // Actual flags...
@@ -83,6 +84,12 @@ public:
   virtual void print(const MachineInstr *MI, std::ostream &O,
                      const TargetMachine &TM) const;
 
+  // getBaseOpcodeFor - This function returns the "base" X86 opcode for the
+  // specified opcode number.
+  //
+  unsigned char getBaseOpcodeFor(unsigned Opcode) const;
+
+
 
   //===--------------------------------------------------------------------===//
   //