Fix IfConverter to handle regmask machine operands.

Note, this is a recommit of r236515 after fixing an error in r236514.  The buildbot ran fast enough that it picked up r236514 prior to r236515 and threw an error.  r236515 itself ran 'make check' without errors.

Original commit message follows:

A regmask (typically seen on a call) clobbers the set of registers it lists.  The IfConverter, in UpdatePredRedefs, was handling register defs, but not regmasks.

These are slightly different to a def in that we need to add both an implicit use and def to appease the machine verifier.  Otherwise, uses after the if converted call could think they are reading an undefined register.

Reviewed by Matthias Braun and Quentin Colombet.

llvm-svn: 236550

1 files changed, 14 insertions, 1 deletions

diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp
index 6359d765da4..3ac78b25854 100644
--- a/llvm/lib/CodeGen/IfConversion.cpp
+++ b/llvm/lib/CodeGen/IfConversion.cpp
@@ -985,8 +985,21 @@ static void UpdatePredRedefs(MachineInstr *MI, LivePhysRegs &Redefs) {
     // take a mutable instruction instead of const.
     MachineInstr *OpMI = const_cast<MachineInstr*>(Op.getParent());
     MachineInstrBuilder MIB(*OpMI->getParent()->getParent(), OpMI);
-    if (Op.isReg())
+    if (Op.isRegMask()) {
+      // First handle regmasks.  They clobber any entries in the mask which
+      // means that we need a def for those registers.
       MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
+
+      // We also need to add an implicit def of this register for the later
+      // use to read from.
+      // For the register allocator to have allocated a register clobbered
+      // by the call which is used later, it must be the case that
+      // the call doesn't return.
+      MIB.addReg(Reg.first, RegState::Implicit | RegState::Define);
+      continue;
+    }
+    assert(Op.isReg() && "Register operand required");
+    MIB.addReg(Reg.first, RegState::Implicit | RegState::Undef);
   }
 }