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authorMichael Kuperstein <michael.m.kuperstein@intel.com>2015-02-04 18:54:01 +0000
committerMichael Kuperstein <michael.m.kuperstein@intel.com>2015-02-04 18:54:01 +0000
commitcd63c5fa73e7534a665b1ce74804dd5452138978 (patch)
tree6914a11feb323898ea3226e0a9b572775151513d /llvm/lib
parent9559232f1d576b0f2cb47c1f11bf34b48cdfda61 (diff)
downloadbcm5719-llvm-cd63c5fa73e7534a665b1ce74804dd5452138978.tar.gz
bcm5719-llvm-cd63c5fa73e7534a665b1ce74804dd5452138978.zip
Fixes a bug in vector load legalization that confused bits and bytes.
Differential Revision: http://reviews.llvm.org/D7400 llvm-svn: 228168
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
index eac404c5036..11e6b38f076 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
@@ -554,9 +554,9 @@ SDValue VectorLegalizer::ExpandLoad(SDValue Op) {
BitOffset += SrcEltBits;
if (BitOffset >= WideBits) {
WideIdx++;
- Offset -= WideBits;
- if (Offset > 0) {
- ShAmt = DAG.getConstant(SrcEltBits - Offset,
+ BitOffset -= WideBits;
+ if (BitOffset > 0) {
+ ShAmt = DAG.getConstant(SrcEltBits - BitOffset,
TLI.getShiftAmountTy(WideVT));
Hi = DAG.getNode(ISD::SHL, dl, WideVT, LoadVals[WideIdx], ShAmt);
Hi = DAG.getNode(ISD::AND, dl, WideVT, Hi, SrcEltBitMask);
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