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| author | Craig Topper <craig.topper@intel.com> | 2018-01-03 18:11:01 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-01-03 18:11:01 +0000 |
| commit | cc6637b70703115823ab7c2e2035c4173d39120e (patch) | |
| tree | 933ac7e15ed010564933b7873224ffc315007e10 /llvm/lib | |
| parent | 70dfbf2b2b1a48d37562362b87f08deb78437ddf (diff) | |
| download | bcm5719-llvm-cc6637b70703115823ab7c2e2035c4173d39120e.tar.gz bcm5719-llvm-cc6637b70703115823ab7c2e2035c4173d39120e.zip | |
[X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg
Currently we use SIGN_EXTEND in lowerMasksToReg as part of calling convention setup, but we don't require a specific value for the upper bits.
This patch changes it to ANY_EXTEND which will be lowered as SIGN_EXTEND if it ends up sticking around.
llvm-svn: 321746
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index a6f56877bd6..9526f27ddfc 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2174,7 +2174,7 @@ static SDValue lowerMasksToReg(const SDValue &ValArg, const EVT &ValLoc, // bitcast: v32i1 -> i32 / v64i1 -> i64 return DAG.getBitcast(ValLoc, ValArg); } else - return DAG.getNode(ISD::SIGN_EXTEND, Dl, ValLoc, ValArg); + return DAG.getNode(ISD::ANY_EXTEND, Dl, ValLoc, ValArg); } /// Breaks v64i1 value into two registers and adds the new node to the DAG |
