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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:04:38 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2015-02-18 02:04:38 +0000 |
| commit | caa1288fff2b7a05854dc981c7bc9eeb229eba9e (patch) | |
| tree | 926478708ac0c06225ff126807afe7aa67b8c035 /llvm/lib | |
| parent | 2ad8bab7eec8fcc667fda7fec82f6c5e9f74dd4b (diff) | |
| download | bcm5719-llvm-caa1288fff2b7a05854dc981c7bc9eeb229eba9e.tar.gz bcm5719-llvm-caa1288fff2b7a05854dc981c7bc9eeb229eba9e.zip | |
R600/SI: Add missing offset operand to buffer bothen
llvm-svn: 229605
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 966ce894699..a402616855c 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -1856,8 +1856,8 @@ multiclass MUBUF_Load_Helper <mubuf op, string name, RegisterClass regClass, let offen = 1, idxen = 1 in { defm _BOTHEN : MUBUF_m <op, name#"_bothen", (outs regClass:$vdata), (ins SReg_128:$srsrc, VReg_64:$vaddr, - SCSrc_32:$soffset, glc:$glc, slc:$slc, tfe:$tfe), - name#" $vdata, $vaddr, $srsrc, $soffset, idxen offen"#"$glc"#"$slc"#"$tfe", []>; + SCSrc_32:$soffset, mbuf_offset:$offset, glc:$glc, slc:$slc, tfe:$tfe), + name#" $vdata, $vaddr, $srsrc, $soffset idxen offen"#"$offset"#"$glc"#"$slc"#"$tfe", []>; } let offen = 0, idxen = 0, glc = 0, slc = 0, tfe = 0 in { diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index fbd38c959c8..e14c52078b6 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -2948,9 +2948,9 @@ multiclass MUBUF_Load_Dword <ValueType vt, MUBUF offset, MUBUF offen, MUBUF idxe def : Pat < (vt (int_SI_buffer_load_dword v4i32:$rsrc, v2i32:$vaddr, i32:$soffset, - imm, 1, 1, imm:$glc, imm:$slc, + imm:$offset, 1, 1, imm:$glc, imm:$slc, imm:$tfe)), - (bothen $rsrc, $vaddr, $soffset, (as_i1imm $glc), (as_i1imm $slc), + (bothen $rsrc, $vaddr, $soffset, (as_i16imm $offset), (as_i1imm $glc), (as_i1imm $slc), (as_i1imm $tfe)) >; } |

