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| author | Craig Topper <craig.topper@intel.com> | 2017-11-13 06:46:48 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-13 06:46:48 +0000 |
| commit | ca8abedb2a9d4540e42582849a226542904bb946 (patch) | |
| tree | 2204754082f6fb6551251e3f2e84a0e7d3b0be5a /llvm/lib | |
| parent | bf328f263e3b111ceef2f8100567d6ee9292367c (diff) | |
| download | bcm5719-llvm-ca8abedb2a9d4540e42582849a226542904bb946.tar.gz bcm5719-llvm-ca8abedb2a9d4540e42582849a226542904bb946.zip | |
[X86] Use sse_load_f32/f64 to improve load folding for scalar VFPCLASS intrinsics.
llvm-svn: 318019
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 12b37874485..5a59645946c 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -2365,18 +2365,18 @@ multiclass avx512_scalar_fpclass<bits<8> opc, string OpcodeStr, SDNode OpNode, (OpNode (_.VT _.RC:$src1), (i32 imm:$src2))))], NoItinerary>, EVEX_K; def rm : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst), - (ins _.ScalarMemOp:$src1, i32u8imm:$src2), + (ins _.IntScalarMemOp:$src1, i32u8imm:$src2), OpcodeStr##_.Suffix## "\t{$src2, $src1, $dst|$dst, $src1, $src2}", [(set _.KRC:$dst, - (OpNode (_.VT (scalar_to_vector (_.ScalarLdFrag addr:$src1))), + (OpNode _.ScalarIntMemCPat:$src1, (i32 imm:$src2)))], NoItinerary>; def rmk : AVX512<opc, MRMSrcMem, (outs _.KRC:$dst), - (ins _.KRCWM:$mask, _.ScalarMemOp:$src1, i32u8imm:$src2), + (ins _.KRCWM:$mask, _.IntScalarMemOp:$src1, i32u8imm:$src2), OpcodeStr##_.Suffix## "\t{$src2, $src1, $dst {${mask}}|$dst {${mask}}, $src1, $src2}", [(set _.KRC:$dst,(or _.KRCWM:$mask, - (OpNode (_.VT (scalar_to_vector (_.ScalarLdFrag addr:$src1))), + (OpNode _.ScalarIntMemCPat:$src1, (i32 imm:$src2))))], NoItinerary>, EVEX_K; } } |
