summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2015-06-04 16:17:34 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2015-06-04 16:17:34 +0000
commitca519dc28b0af4c80b2f8ed8646b81940e8af814 (patch)
treed02ad3e42d211d25c4eed9735f7321139351293c /llvm/lib
parenta5c092d844939da540d6c91463a1e565cdc487e3 (diff)
downloadbcm5719-llvm-ca519dc28b0af4c80b2f8ed8646b81940e8af814.tar.gz
bcm5719-llvm-ca519dc28b0af4c80b2f8ed8646b81940e8af814.zip
Pass address space to isLegalAddressingMode in DAGCombiner
No test because I don't know of a target that makes use of address spaces and indexed load / store. llvm-svn: 239051
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp6
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 2c2dc859816..439ddb292e4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9061,14 +9061,18 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
SelectionDAG &DAG,
const TargetLowering &TLI) {
EVT VT;
+ unsigned AS;
+
if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Use)) {
if (LD->isIndexed() || LD->getBasePtr().getNode() != N)
return false;
VT = LD->getMemoryVT();
+ AS = LD->getAddressSpace();
} else if (StoreSDNode *ST = dyn_cast<StoreSDNode>(Use)) {
if (ST->isIndexed() || ST->getBasePtr().getNode() != N)
return false;
VT = ST->getMemoryVT();
+ AS = ST->getAddressSpace();
} else
return false;
@@ -9092,7 +9096,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use,
} else
return false;
- return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext()));
+ return TLI.isLegalAddressingMode(AM, VT.getTypeForEVT(*DAG.getContext()), AS);
}
/// Try turning a load/store into a pre-indexed load/store when the base
OpenPOWER on IntegriCloud