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| author | Sanjay Patel <spatel@rotateright.com> | 2015-09-03 16:36:16 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2015-09-03 16:36:16 +0000 |
| commit | c9ae9d72f8eeefd2883e2d5eaccca30281898f7e (patch) | |
| tree | 5987c3f217800b49211a6fabeaa306776b96a1f3 /llvm/lib | |
| parent | 31e66e32b4d80f990ec46b7248cfeb593a71085d (diff) | |
| download | bcm5719-llvm-c9ae9d72f8eeefd2883e2d5eaccca30281898f7e.tar.gz bcm5719-llvm-c9ae9d72f8eeefd2883e2d5eaccca30281898f7e.zip | |
[x86] enable machine combiner reassociations for scalar 'xor' insts
llvm-svn: 246781
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index cf9d8a8aac3..8b883162999 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -6401,6 +6401,10 @@ static bool isAssociativeAndCommutative(const MachineInstr &Inst) { case X86::OR16rr: case X86::OR32rr: case X86::OR64rr: + case X86::XOR8rr: + case X86::XOR16rr: + case X86::XOR32rr: + case X86::XOR64rr: case X86::IMUL16rr: case X86::IMUL32rr: case X86::IMUL64rr: |
