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authorCraig Topper <craig.topper@intel.com>2018-08-01 18:38:46 +0000
committerCraig Topper <craig.topper@intel.com>2018-08-01 18:38:46 +0000
commitc985d42903f31f7c8b1e4e68cdceebe61a12fcea (patch)
treed1039f5a3bd77e78419de53a5c42c694ad2c0dc5 /llvm/lib
parentffb8eb30ff85d5d2ffbfbebc36b0f2002dc3aa99 (diff)
downloadbcm5719-llvm-c985d42903f31f7c8b1e4e68cdceebe61a12fcea.tar.gz
bcm5719-llvm-c985d42903f31f7c8b1e4e68cdceebe61a12fcea.zip
[X86] Canonicalize the pattern for __builtin_ffs in a similar way to '__builtin_ffs + 5'
We now emit a move of -1 before the cmov and do the addition after the cmov just like the case with an extra addition. This may be slightly worse for code size, but is more consistent with other compilers. And we might be able to hoist the mov -1 outside of loops. llvm-svn: 338613
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp12
1 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 6c49e24cc05..f77a716434f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -33395,10 +33395,13 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
SDValue Add = TrueOp;
SDValue Const = FalseOp;
// Canonicalize the condition code for easier matching and output.
- if (CC == X86::COND_E) {
+ if (CC == X86::COND_E)
std::swap(Add, Const);
- CC = X86::COND_NE;
- }
+
+ // We might have replaced the constant in the cmov with the LHS of the
+ // compare. If so change it to the RHS of the compare.
+ if (Const == Cond.getOperand(0))
+ Const = Cond.getOperand(1);
// Ok, now make sure that Add is (add (cttz X), C2) and Const is a constant.
if (isa<ConstantSDNode>(Const) && Add.getOpcode() == ISD::ADD &&
@@ -33410,7 +33413,8 @@ static SDValue combineCMov(SDNode *N, SelectionDAG &DAG,
// This should constant fold.
SDValue Diff = DAG.getNode(ISD::SUB, DL, VT, Const, Add.getOperand(1));
SDValue CMov = DAG.getNode(X86ISD::CMOV, DL, VT, Diff, Add.getOperand(0),
- DAG.getConstant(CC, DL, MVT::i8), Cond);
+ DAG.getConstant(X86::COND_NE, DL, MVT::i8),
+ Cond);
return DAG.getNode(ISD::ADD, DL, VT, CMov, Add.getOperand(1));
}
}
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