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author | Craig Topper <craig.topper@intel.com> | 2018-05-07 00:47:02 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2018-05-07 00:47:02 +0000 |
commit | c882014f431478504bd0835972a2b83d827cc6c6 (patch) | |
tree | c1d54ed012d195071eb5cc16e1ee869348379dd7 /llvm/lib | |
parent | 07f0a68ba317b9df90169f8b072977a032dd6588 (diff) | |
download | bcm5719-llvm-c882014f431478504bd0835972a2b83d827cc6c6.tar.gz bcm5719-llvm-c882014f431478504bd0835972a2b83d827cc6c6.zip |
[X86] Fix copy/paste mistake in comment. NFC
llvm-svn: 331611
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b7bd22f8f39..128faffd7cd 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17853,7 +17853,7 @@ SDValue X86TargetLowering::getRecipEstimate(SDValue Op, SelectionDAG &DAG, if (RefinementSteps == ReciprocalEstimate::Unspecified) RefinementSteps = 1; - // There is no FSQRT for 512-bits, but there is RSQRT14. + // There is no FSQRT for 512-bits, but there is RCP14. unsigned Opcode = VT == MVT::v16f32 ? X86ISD::RCP14 : X86ISD::FRCP; return DAG.getNode(Opcode, SDLoc(Op), VT, Op); } |