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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-26 23:06:33 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-26 23:06:33 +0000 |
| commit | c6b69a911470843852f7a89bb13e942161831d22 (patch) | |
| tree | fb2af78f97fa0c535c46eb09de7ce43f584f491b /llvm/lib | |
| parent | 7101d73c71ec9dd53b092ed354357ac5a2e1d34c (diff) | |
| download | bcm5719-llvm-c6b69a911470843852f7a89bb13e942161831d22.tar.gz bcm5719-llvm-c6b69a911470843852f7a89bb13e942161831d22.zip | |
AMDGPU: Use implicit_def for selecting anyext
llvm-svn: 276819
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 61460057803..1319856dd04 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -3362,11 +3362,16 @@ def : Pat < (S_BFE_I64 i64:$src, 0x200000) // 0 | 32 << 16 >; -class ZExt_i64_i32_Pat <SDNode ext> : Pat < - (i64 (ext i32:$src)), +def : Pat < + (i64 (zext i32:$src)), (REG_SEQUENCE SReg_64, $src, sub0, (S_MOV_B32 0), sub1) >; +def : Pat < + (i64 (anyext i32:$src)), + (REG_SEQUENCE SReg_64, $src, sub0, (i32 (IMPLICIT_DEF)), sub1) +>; + class ZExt_i64_i1_Pat <SDNode ext> : Pat < (i64 (ext i1:$src)), (REG_SEQUENCE VReg_64, @@ -3375,8 +3380,6 @@ class ZExt_i64_i1_Pat <SDNode ext> : Pat < >; -def : ZExt_i64_i32_Pat<zext>; -def : ZExt_i64_i32_Pat<anyext>; def : ZExt_i64_i1_Pat<zext>; def : ZExt_i64_i1_Pat<anyext>; |
