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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-10 19:11:51 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-10 19:11:51 +0000 |
| commit | c6b1350039ac86b0c45d01a92dbe5d4beae24630 (patch) | |
| tree | e09f7430d27520aaf3636cb1c8ac56c446fff9c9 /llvm/lib | |
| parent | f4af802381a4b71a06a3dce32a5aeb25d0aa7adc (diff) | |
| download | bcm5719-llvm-c6b1350039ac86b0c45d01a92dbe5d4beae24630.tar.gz bcm5719-llvm-c6b1350039ac86b0c45d01a92dbe5d4beae24630.zip | |
AMDGPU: Set sizes on control flow pseudos
llvm-svn: 278276
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 26 |
1 files changed, 17 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index bea61493812..57ce036f57a 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -1791,40 +1791,48 @@ def SI_IF: PseudoInstSI < (outs SReg_64:$dst), (ins SReg_64:$vcc, brtarget:$target), [(set i64:$dst, (int_amdgcn_if i1:$vcc, bb:$target))]> { let Constraints = ""; + let Size = 8; } def SI_ELSE : PseudoInstSI < (outs SReg_64:$dst), (ins SReg_64:$src, brtarget:$target, i1imm:$execfix)> { let Constraints = "$src = $dst"; + let Size = 12; } def SI_LOOP : PseudoInstSI < (outs), (ins SReg_64:$saved, brtarget:$target), - [(int_amdgcn_loop i64:$saved, bb:$target)] ->; + [(int_amdgcn_loop i64:$saved, bb:$target)]> { + let Size = 8; +} } // End isBranch = 1, isTerminator = 1 def SI_BREAK : PseudoInstSI < (outs SReg_64:$dst), (ins SReg_64:$src), - [(set i64:$dst, (int_amdgcn_break i64:$src))] ->; + [(set i64:$dst, (int_amdgcn_break i64:$src))]> { + let Size = 4; +} def SI_IF_BREAK : PseudoInstSI < (outs SReg_64:$dst), (ins SReg_64:$vcc, SReg_64:$src), [(set i64:$dst, (int_amdgcn_if_break i1:$vcc, i64:$src))] ->; +> { + let Size = 4; +} def SI_ELSE_BREAK : PseudoInstSI < (outs SReg_64:$dst), (ins SReg_64:$src0, SReg_64:$src1), - [(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))] ->; + [(set i64:$dst, (int_amdgcn_else_break i64:$src0, i64:$src1))]> { + let Size = 4; +} def SI_END_CF : PseudoInstSI < (outs), (ins SReg_64:$saved), - [(int_amdgcn_end_cf i64:$saved)] ->; + [(int_amdgcn_end_cf i64:$saved)]> { + let Size = 4; +} } // End Uses = [EXEC], Defs = [EXEC, SCC] |
