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| author | Craig Topper <craig.topper@gmail.com> | 2014-12-26 18:20:05 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-12-26 18:20:05 +0000 |
| commit | c4b12166f231e9f42c8c6bee710c95583b77dd45 (patch) | |
| tree | 4578bdac40214ee49dd537e443acd9b96b8067c9 /llvm/lib | |
| parent | d5b39237a1a57d49b9aeb0c349a9f335e6d38b11 (diff) | |
| download | bcm5719-llvm-c4b12166f231e9f42c8c6bee710c95583b77dd45.tar.gz bcm5719-llvm-c4b12166f231e9f42c8c6bee710c95583b77dd45.zip | |
[X86] Add the debug registers DR8-DR15 so we can assemble and disassemble references to them.
llvm-svn: 224862
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.td | 24 |
3 files changed, 25 insertions, 11 deletions
diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp index d9766f5c157..606001d988a 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp @@ -1453,8 +1453,6 @@ static int readModRM(struct InternalInstruction* insn) { *valid = 0; \ return prefix##_ES + index; \ case TYPE_DEBUGREG: \ - if (index > 7) \ - *valid = 0; \ return prefix##_DR0 + index; \ case TYPE_CONTROLREG: \ return prefix##_CR0 + index; \ diff --git a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h index 46a74ab4e52..a79a923ac52 100644 --- a/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h +++ b/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h @@ -341,7 +341,15 @@ namespace X86Disassembler { ENTRY(DR4) \ ENTRY(DR5) \ ENTRY(DR6) \ - ENTRY(DR7) + ENTRY(DR7) \ + ENTRY(DR8) \ + ENTRY(DR9) \ + ENTRY(DR10) \ + ENTRY(DR11) \ + ENTRY(DR12) \ + ENTRY(DR13) \ + ENTRY(DR14) \ + ENTRY(DR15) #define REGS_CONTROL \ ENTRY(CR0) \ diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td index 311a7178149..30cd09a5a2f 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.td +++ b/llvm/lib/Target/X86/X86RegisterInfo.td @@ -263,14 +263,22 @@ def FS : X86Reg<"fs", 4>; def GS : X86Reg<"gs", 5>; // Debug registers -def DR0 : X86Reg<"dr0", 0>; -def DR1 : X86Reg<"dr1", 1>; -def DR2 : X86Reg<"dr2", 2>; -def DR3 : X86Reg<"dr3", 3>; -def DR4 : X86Reg<"dr4", 4>; -def DR5 : X86Reg<"dr5", 5>; -def DR6 : X86Reg<"dr6", 6>; -def DR7 : X86Reg<"dr7", 7>; +def DR0 : X86Reg<"dr0", 0>; +def DR1 : X86Reg<"dr1", 1>; +def DR2 : X86Reg<"dr2", 2>; +def DR3 : X86Reg<"dr3", 3>; +def DR4 : X86Reg<"dr4", 4>; +def DR5 : X86Reg<"dr5", 5>; +def DR6 : X86Reg<"dr6", 6>; +def DR7 : X86Reg<"dr7", 7>; +def DR8 : X86Reg<"dr8", 8>; +def DR9 : X86Reg<"dr9", 9>; +def DR10 : X86Reg<"dr10", 10>; +def DR11 : X86Reg<"dr11", 11>; +def DR12 : X86Reg<"dr12", 12>; +def DR13 : X86Reg<"dr13", 13>; +def DR14 : X86Reg<"dr14", 14>; +def DR15 : X86Reg<"dr15", 15>; // Control registers def CR0 : X86Reg<"cr0", 0>; |
