AMDGPU/GCN: Bring processors in sync with AMDGPUUsage

  - Add gfx704
    - Change bonaire to gfx704
  - Remove gfx804
  - Remove gfx901
  - Remove gfx903

Differential Revision: https://reviews.llvm.org/D40046

llvm-svn: 320194

4 files changed, 21 insertions, 46 deletions

diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index 3bf5c8885f5..c02d0a13104 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -540,6 +540,10 @@ def FeatureISAVersion7_0_3 : SubtargetFeatureISAVersion <7,0,3,
   [FeatureSeaIslands,
    FeatureLDSBankCount16]>;
 
+def FeatureISAVersion7_0_4 : SubtargetFeatureISAVersion <7,0,4,
+  [FeatureSeaIslands,
+   FeatureLDSBankCount32]>;
+
 def FeatureISAVersion8_0_0 : SubtargetFeatureISAVersion <8,0,0,
   [FeatureVolcanicIslands,
    FeatureLDSBankCount32,
@@ -561,10 +565,6 @@ def FeatureISAVersion8_0_3 : SubtargetFeatureISAVersion <8,0,3,
   [FeatureVolcanicIslands,
    FeatureLDSBankCount32]>;
 
-def FeatureISAVersion8_0_4 : SubtargetFeatureISAVersion <8,0,4,
-  [FeatureVolcanicIslands,
-   FeatureLDSBankCount32]>;
-
 def FeatureISAVersion8_1_0 : SubtargetFeatureISAVersion <8,1,0,
   [FeatureVolcanicIslands,
    FeatureLDSBankCount16,
@@ -576,24 +576,12 @@ def FeatureISAVersion9_0_0 : SubtargetFeatureISAVersion <9,0,0,
    FeatureLDSBankCount32
    ]>;
 
-def FeatureISAVersion9_0_1 : SubtargetFeatureISAVersion <9,0,1,
-  [FeatureGFX9,
-   FeatureMadMixInsts,
-   FeatureLDSBankCount32,
-   FeatureXNACK]>;
-
 def FeatureISAVersion9_0_2 : SubtargetFeatureISAVersion <9,0,2,
   [FeatureGFX9,
    FeatureMadMixInsts,
    FeatureLDSBankCount32
    ]>;
 
-def FeatureISAVersion9_0_3 : SubtargetFeatureISAVersion <9,0,3,
-  [FeatureGFX9,
-   FeatureMadMixInsts,
-   FeatureLDSBankCount32,
-   FeatureXNACK]>;
-
 //===----------------------------------------------------------------------===//
 // Debugger related subtarget features.
 //===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index 456bbdb28e4..09ad88fca17 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -66,16 +66,14 @@ public:
     ISAVersion7_0_1,
     ISAVersion7_0_2,
     ISAVersion7_0_3,
+    ISAVersion7_0_4,
     ISAVersion8_0_0,
     ISAVersion8_0_1,
     ISAVersion8_0_2,
     ISAVersion8_0_3,
-    ISAVersion8_0_4,
     ISAVersion8_1_0,
     ISAVersion9_0_0,
-    ISAVersion9_0_1,
-    ISAVersion9_0_2,
-    ISAVersion9_0_3
+    ISAVersion9_0_2
   };
 
   enum TrapHandlerAbi {
diff --git a/llvm/lib/Target/AMDGPU/GCNProcessors.td b/llvm/lib/Target/AMDGPU/GCNProcessors.td
index 3b9d552d127..b2a3f652abd 100644
--- a/llvm/lib/Target/AMDGPU/GCNProcessors.td
+++ b/llvm/lib/Target/AMDGPU/GCNProcessors.td
@@ -53,10 +53,6 @@ def : ProcessorModel<"gfx700", SIQuarterSpeedModel,
   [FeatureISAVersion7_0_0]
 >;
 
-def : ProcessorModel<"bonaire", SIQuarterSpeedModel,
-  [FeatureISAVersion7_0_0]
->;
-
 def : ProcessorModel<"kaveri", SIQuarterSpeedModel,
   [FeatureISAVersion7_0_0]
 >;
@@ -85,6 +81,14 @@ def : ProcessorModel<"mullins", SIQuarterSpeedModel,
   [FeatureISAVersion7_0_3]
 >;
 
+def : ProcessorModel<"gfx704", SIQuarterSpeedModel,
+  [FeatureISAVersion7_0_4]
+>;
+
+def : ProcessorModel<"bonaire", SIQuarterSpeedModel,
+  [FeatureISAVersion7_0_4]
+>;
+
 //===----------------------------------------------------------------------===//
 // GCN GFX8 (Volcanic Islands (VI)).
 //===----------------------------------------------------------------------===//
@@ -129,10 +133,6 @@ def : ProcessorModel<"polaris11", SIQuarterSpeedModel,
   [FeatureISAVersion8_0_3]
 >;
 
-def : ProcessorModel<"gfx804", SIQuarterSpeedModel,
-  [FeatureISAVersion8_0_4]
->;
-
 def : ProcessorModel<"gfx810", SIQuarterSpeedModel,
   [FeatureISAVersion8_1_0]
 >;
@@ -149,14 +149,6 @@ def : ProcessorModel<"gfx900", SIQuarterSpeedModel,
   [FeatureISAVersion9_0_0]
 >;
 
-def : ProcessorModel<"gfx901", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_1]
->;
-
 def : ProcessorModel<"gfx902", SIQuarterSpeedModel,
   [FeatureISAVersion9_0_2]
 >;
-
-def : ProcessorModel<"gfx903", SIQuarterSpeedModel,
-  [FeatureISAVersion9_0_3]
->;
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
index 15fdbc2d1e4..177b030b31f 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
@@ -103,12 +103,13 @@ namespace AMDGPU {
 namespace IsaInfo {
 
 IsaVersion getIsaVersion(const FeatureBitset &Features) {
-  // SI.
+  // GCN GFX6 (Southern Islands (SI)).
   if (Features.test(FeatureISAVersion6_0_0))
     return {6, 0, 0};
   if (Features.test(FeatureISAVersion6_0_1))
     return {6, 0, 1};
-  // CI.
+
+  // GCN GFX7 (Sea Islands (CI)).
   if (Features.test(FeatureISAVersion7_0_0))
     return {7, 0, 0};
   if (Features.test(FeatureISAVersion7_0_1))
@@ -117,8 +118,10 @@ IsaVersion getIsaVersion(const FeatureBitset &Features) {
     return {7, 0, 2};
   if (Features.test(FeatureISAVersion7_0_3))
     return {7, 0, 3};
+  if (Features.test(FeatureISAVersion7_0_4))
+    return {7, 0, 4};
 
-  // VI.
+  // GCN GFX8 (Volcanic Islands (VI)).
   if (Features.test(FeatureISAVersion8_0_0))
     return {8, 0, 0};
   if (Features.test(FeatureISAVersion8_0_1))
@@ -127,20 +130,14 @@ IsaVersion getIsaVersion(const FeatureBitset &Features) {
     return {8, 0, 2};
   if (Features.test(FeatureISAVersion8_0_3))
     return {8, 0, 3};
-  if (Features.test(FeatureISAVersion8_0_4))
-    return {8, 0, 4};
   if (Features.test(FeatureISAVersion8_1_0))
     return {8, 1, 0};
 
-  // GFX9.
+  // GCN GFX9.
   if (Features.test(FeatureISAVersion9_0_0))
     return {9, 0, 0};
-  if (Features.test(FeatureISAVersion9_0_1))
-    return {9, 0, 1};
   if (Features.test(FeatureISAVersion9_0_2))
     return {9, 0, 2};
-  if (Features.test(FeatureISAVersion9_0_3))
-    return {9, 0, 3};
 
   if (!Features.test(FeatureGCN) || Features.test(FeatureSouthernIslands))
     return {0, 0, 0};