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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-06-21 11:13:15 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-06-21 11:13:15 +0000 |
| commit | c26b8f2afcec9d5d4a1a08f1d5bf6e3598b65077 (patch) | |
| tree | de6e66c4f9337ae17122eb613655e4008e9ca03f /llvm/lib | |
| parent | 22e478f0545762ed4c57d5a7d71b4cd191c51c36 (diff) | |
| download | bcm5719-llvm-c26b8f2afcec9d5d4a1a08f1d5bf6e3598b65077.tar.gz bcm5719-llvm-c26b8f2afcec9d5d4a1a08f1d5bf6e3598b65077.zip | |
[X86] combineAndnp - use isNOT instead of manually checking for (XOR x, -1)
llvm-svn: 364026
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index e15acc7d993..9c03f583be7 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -41023,11 +41023,9 @@ static SDValue combineAndnp(SDNode *N, SelectionDAG &DAG, return DAG.getConstant(0, SDLoc(N), VT); // Turn ANDNP back to AND if input is inverted. - if (VT.isVector() && N->getOperand(0).getOpcode() == ISD::XOR && - ISD::isBuildVectorAllOnes(N->getOperand(0).getOperand(1).getNode())) { - return DAG.getNode(ISD::AND, SDLoc(N), VT, - N->getOperand(0).getOperand(0), N->getOperand(1)); - } + if (SDValue Not = IsNOT(N->getOperand(0), DAG)) + return DAG.getNode(ISD::AND, SDLoc(N), VT, DAG.getBitcast(VT, Not), + N->getOperand(1)); // Attempt to recursively combine a bitmask ANDNP with shuffles. if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) { |
