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authorChris Lattner <sabre@nondot.org>2006-06-08 18:27:11 +0000
committerChris Lattner <sabre@nondot.org>2006-06-08 18:27:11 +0000
commitc03a9259c07a4a45918ca77cae65c858aa06d872 (patch)
treeb82b9e98a1dcd315970ec709ae26e31a27e6b715 /llvm/lib
parent38b318d43655f482b06f89609a2653a7ca3efded (diff)
downloadbcm5719-llvm-c03a9259c07a4a45918ca77cae65c858aa06d872.tar.gz
bcm5719-llvm-c03a9259c07a4a45918ca77cae65c858aa06d872.zip
Fix X86/inline-asm.ll:test2, a case where an input value was implicitly
truncated. llvm-svn: 28733
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp9
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 57f74468ada..0a9cb637b47 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1804,9 +1804,12 @@ void RegsForValue::getCopyToRegs(SDOperand Val, SelectionDAG &DAG,
// If there is a single register and the types differ, this must be
// a promotion.
if (RegVT != ValueVT) {
- if (MVT::isInteger(RegVT))
- Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
- else
+ if (MVT::isInteger(RegVT)) {
+ if (RegVT < ValueVT)
+ Val = DAG.getNode(ISD::TRUNCATE, RegVT, Val);
+ else
+ Val = DAG.getNode(ISD::ANY_EXTEND, RegVT, Val);
+ } else
Val = DAG.getNode(ISD::FP_EXTEND, RegVT, Val);
}
Chain = DAG.getCopyToReg(Chain, Regs[0], Val, Flag);
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