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| author | Craig Topper <craig.topper@intel.com> | 2017-11-19 06:24:26 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-19 06:24:26 +0000 |
| commit | bece74c694888bd35d437a6778e547e654ae16a6 (patch) | |
| tree | 2d6c881592c323b393fc5c4be310d3a7524f6aa5 /llvm/lib | |
| parent | 512e9e7f3ffbc43cc55cfe14159566f6c91180f8 (diff) | |
| download | bcm5719-llvm-bece74c694888bd35d437a6778e547e654ae16a6.tar.gz bcm5719-llvm-bece74c694888bd35d437a6778e547e654ae16a6.zip | |
[X86] Add test cases for rndscaless/sd intrinsics.
Also fix the memop in the ins for these instructions. Not sure what effect this has.
llvm-svn: 318624
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index 9f6a6d7d894..95dd78255fa 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -7666,7 +7666,7 @@ avx512_rndscale_scalar<bits<8> opc, string OpcodeStr, X86VectorVTInfo _> { (i32 imm:$src3), (i32 FROUND_NO_EXC)))>, EVEX_B; defm m_Int : AVX512_maskable_scalar<opc, MRMSrcMem, _, (outs _.RC:$dst), - (ins _.RC:$src1, _.ScalarMemOp:$src2, i32u8imm:$src3), + (ins _.RC:$src1, _.IntScalarMemOp:$src2, i32u8imm:$src3), OpcodeStr, "$src3, $src2, $src1", "$src1, $src2, $src3", (_.VT (X86RndScales _.RC:$src1, |
