summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorSanjay Patel <spatel@rotateright.com>2015-07-27 17:39:20 +0000
committerSanjay Patel <spatel@rotateright.com>2015-07-27 17:39:20 +0000
commitbeb4cffb4383afb6a188d1eb694a0461dd362383 (patch)
treecc927a9aa030c1a3f8892d19b1f3f2d281a90583 /llvm/lib
parentd31d4c17e6db10f166e90ba63dd50a9815ae5ceb (diff)
downloadbcm5719-llvm-beb4cffb4383afb6a188d1eb694a0461dd362383.tar.gz
bcm5719-llvm-beb4cffb4383afb6a188d1eb694a0461dd362383.zip
fix typo and spacing; NFC
llvm-svn: 243287
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 64ed2e15115..10f61a48379 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -14146,9 +14146,9 @@ SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
}
if (addTest) {
- // Look pass the truncate if the high bits are known zero.
+ // Look past the truncate if the high bits are known zero.
if (isTruncWithZeroHighBitsInput(Cond, DAG))
- Cond = Cond.getOperand(0);
+ Cond = Cond.getOperand(0);
// We know the result of AND is compared against zero. Try to match
// it to BT.
OpenPOWER on IntegriCloud