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| author | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 04:55:40 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2014-03-26 04:55:40 +0000 |
| commit | bd4de9d47872c104465cb64b9fd38b38e530cb0d (patch) | |
| tree | 17df72c850d483cb739930f4784b14201e31f01c /llvm/lib | |
| parent | 3b712a84a9bdcde4b6e8f8f8c9cace2fb3141f24 (diff) | |
| download | bcm5719-llvm-bd4de9d47872c104465cb64b9fd38b38e530cb0d.tar.gz bcm5719-llvm-bd4de9d47872c104465cb64b9fd38b38e530cb0d.zip | |
[PowerPC] Generate logical vector VSX instructions
These instructions are essentially the same as their Altivec counterparts, but
have access to the larger VSX register file.
llvm-svn: 204782
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 17 |
1 files changed, 12 insertions, 5 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index 771c1fbaa57..2762da6ad48 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -658,20 +658,27 @@ let Uses = [RM] in { let isCommutable = 1 in def XXLAND : XX3Form<60, 130, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), - "xxland $XT, $XA, $XB", IIC_VecGeneral, []>; + "xxland $XT, $XA, $XB", IIC_VecGeneral, + [(set v4i32:$XT, (and v4i32:$XA, v4i32:$XB))]>; def XXLANDC : XX3Form<60, 138, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), - "xxlandc $XT, $XA, $XB", IIC_VecGeneral, []>; + "xxlandc $XT, $XA, $XB", IIC_VecGeneral, + [(set v4i32:$XT, (and v4i32:$XA, + (vnot_ppc v4i32:$XB)))]>; let isCommutable = 1 in { def XXLNOR : XX3Form<60, 162, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), - "xxlnor $XT, $XA, $XB", IIC_VecGeneral, []>; + "xxlnor $XT, $XA, $XB", IIC_VecGeneral, + [(set v4i32:$XT, (vnot_ppc (or v4i32:$XA, + v4i32:$XB)))]>; def XXLOR : XX3Form<60, 146, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), - "xxlor $XT, $XA, $XB", IIC_VecGeneral, []>; + "xxlor $XT, $XA, $XB", IIC_VecGeneral, + [(set v4i32:$XT, (or v4i32:$XA, v4i32:$XB))]>; def XXLXOR : XX3Form<60, 154, (outs vsrc:$XT), (ins vsrc:$XA, vsrc:$XB), - "xxlxor $XT, $XA, $XB", IIC_VecGeneral, []>; + "xxlxor $XT, $XA, $XB", IIC_VecGeneral, + [(set v4i32:$XT, (xor v4i32:$XA, v4i32:$XB))]>; } // isCommutable // Permutation Instructions |
