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| author | Bradley Smith <bradley.smith@arm.com> | 2015-03-23 15:59:54 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2015-03-23 15:59:54 +0000 |
| commit | bc0f0d8c49232506b2985304feb56fa5e982289a (patch) | |
| tree | 5bbf41e393e2df35b8db9ae9187a6fe625769a27 /llvm/lib | |
| parent | e13f47e8aa38a977c7dbfa950c4fb55ffdad5f1c (diff) | |
| download | bcm5719-llvm-bc0f0d8c49232506b2985304feb56fa5e982289a.tar.gz bcm5719-llvm-bc0f0d8c49232506b2985304feb56fa5e982289a.zip | |
[ARM] Add more pattern matching for f16 <-> f64 conversions
Specifically when the conversion is done in two steps, f16 -> f32 -> f64.
For example:
%1 = tail call float @llvm.convert.from.fp16.f32(i16 %0)
%conv = fpext float %1 to double
to:
vcvtb.f64.f16
llvm-svn: 232954
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrVFP.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrVFP.td b/llvm/lib/Target/ARM/ARMInstrVFP.td index e0a93149916..cc8a2b0b4c6 100644 --- a/llvm/lib/Target/ARM/ARMInstrVFP.td +++ b/llvm/lib/Target/ARM/ARMInstrVFP.td @@ -627,6 +627,14 @@ def : Pat<(f16_to_fp GPR:$a), def : Pat<(f64 (f16_to_fp GPR:$a)), (VCVTBHD (COPY_TO_REGCLASS GPR:$a, SPR))>; +def : Pat<(f64 (fextend (f16_to_fp GPR:$a))), + (VCVTBHD (COPY_TO_REGCLASS GPR:$a, SPR))>, + Requires<[HasFPARMv8, HasDPVFP]>; + +def : Pat<(fp_to_f16 (fround (f64 DPR:$a))), + (i32 (COPY_TO_REGCLASS (VCVTBDH DPR:$a), GPR))>, + Requires<[HasFPARMv8, HasDPVFP]>; + multiclass vcvt_inst<string opc, bits<2> rm, SDPatternOperator node = null_frag> { let PostEncoderMethod = "", DecoderNamespace = "VFPV8" in { |
