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| author | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-19 21:47:05 +0000 |
|---|---|---|
| committer | Francis Visoiu Mistrih <francisvm@yahoo.com> | 2017-12-19 21:47:05 +0000 |
| commit | bbd610ae925b3d21babc5d41e184cd4a93d172fd (patch) | |
| tree | 9328b3b3dba7e2b4603333a0965b0d38465df9e8 /llvm/lib | |
| parent | 3b265c8fcfef59a35ff00937e9ce06ffc62cf349 (diff) | |
| download | bcm5719-llvm-bbd610ae925b3d21babc5d41e184cd4a93d172fd.tar.gz bcm5719-llvm-bbd610ae925b3d21babc5d41e184cd4a93d172fd.zip | |
[CodeGen] Move printing MO_IntrinsicID operands to MachineOperand::print
Work towards the unification of MIR and debug output by refactoring the
interfaces.
Also add support for printing with a null TargetIntrinsicInfo and no
MachineFunction.
llvm-svn: 321111
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MIRPrinter.cpp | 14 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 6 |
2 files changed, 5 insertions, 15 deletions
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp index eb2157e64b1..9b38b893973 100644 --- a/llvm/lib/CodeGen/MIRPrinter.cpp +++ b/llvm/lib/CodeGen/MIRPrinter.cpp @@ -784,7 +784,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, case MachineOperand::MO_RegisterLiveOut: case MachineOperand::MO_Metadata: case MachineOperand::MO_MCSymbol: - case MachineOperand::MO_CFIIndex: { + case MachineOperand::MO_CFIIndex: + case MachineOperand::MO_IntrinsicID: { unsigned TiedOperandIdx = 0; if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef()) TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx); @@ -813,17 +814,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx, printCustomRegMask(Op.getRegMask(), OS, TRI); break; } - case MachineOperand::MO_IntrinsicID: { - Intrinsic::ID ID = Op.getIntrinsicID(); - if (ID < Intrinsic::num_intrinsics) - OS << "intrinsic(@" << Intrinsic::getName(ID, None) << ')'; - else { - const MachineFunction &MF = *Op.getParent()->getMF(); - const TargetIntrinsicInfo *TII = MF.getTarget().getIntrinsicInfo(); - OS << "intrinsic(@" << TII->getName(ID) << ')'; - } - break; - } case MachineOperand::MO_Predicate: { auto Pred = static_cast<CmpInst::Predicate>(Op.getPredicate()); OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred(" diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 9031bdebc8a..586e826be58 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -798,11 +798,11 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, case MachineOperand::MO_IntrinsicID: { Intrinsic::ID ID = getIntrinsicID(); if (ID < Intrinsic::num_intrinsics) - OS << "<intrinsic:@" << Intrinsic::getName(ID, None) << '>'; + OS << "intrinsic(@" << Intrinsic::getName(ID, None) << ')'; else if (IntrinsicInfo) - OS << "<intrinsic:@" << IntrinsicInfo->getName(ID) << '>'; + OS << "intrinsic(@" << IntrinsicInfo->getName(ID) << ')'; else - OS << "<intrinsic:" << ID << '>'; + OS << "intrinsic(" << ID << ')'; break; } case MachineOperand::MO_Predicate: { |
