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authorDuncan P. N. Exon Smith <dexonsmith@apple.com>2015-07-10 22:33:01 +0000
committerDuncan P. N. Exon Smith <dexonsmith@apple.com>2015-07-10 22:33:01 +0000
commitbb57d73805449f9c36de2bd14a44e8cd4ff36d4a (patch)
tree223cc575616d7c662ac3634560e29850728baa4b /llvm/lib
parenta6b929dfe2bb672b2569a8ab328da05018b884d9 (diff)
downloadbcm5719-llvm-bb57d73805449f9c36de2bd14a44e8cd4ff36d4a.tar.gz
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MC: Remove MCSubtargetInfo::InitCPUSched()
Remove all calls to `MCSubtargetInfo::InitCPUSched()` and merge its body into the only relevant caller, `MCSubtargetInfo::InitMCProcessorInfo()`. We were only calling the former after explicitly calling the latter with the same CPU; it's confusing to have both methods exposed. Besides a minor (surely unmeasurable) speedup in ARM and X86 from avoiding running the logic twice, no functionality change. llvm-svn: 241956
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/MC/MCSubtargetInfo.cpp5
-rw-r--r--llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp1
-rw-r--r--llvm/lib/Target/X86/X86Subtarget.cpp5
3 files changed, 1 insertions, 10 deletions
diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp
index 414512a3a2c..387d5cd05d0 100644
--- a/llvm/lib/MC/MCSubtargetInfo.cpp
+++ b/llvm/lib/MC/MCSubtargetInfo.cpp
@@ -23,11 +23,6 @@ void
MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
SubtargetFeatures Features(FS);
FeatureBits = Features.getFeatureBits(CPU, ProcDesc, ProcFeatures);
- InitCPUSchedModel(CPU);
-}
-
-void
-MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
if (!CPU.empty())
CPUSchedModel = &getSchedModelForCPU(CPU);
else
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 88b06f7b938..074c485023a 100644
--- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -9213,7 +9213,6 @@ bool ARMAsmParser::parseDirectiveCPU(SMLoc L) {
}
STI.InitMCProcessorInfo(CPU, "");
- STI.InitCPUSchedModel(CPU);
setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
return false;
diff --git a/llvm/lib/Target/X86/X86Subtarget.cpp b/llvm/lib/Target/X86/X86Subtarget.cpp
index 758d2b02df3..dff3624b7ef 100644
--- a/llvm/lib/Target/X86/X86Subtarget.cpp
+++ b/llvm/lib/Target/X86/X86Subtarget.cpp
@@ -192,12 +192,9 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
FullFS = "+64bit,+sse2";
}
- // If feature string is not empty, parse features string.
+ // Parse features string and set the CPU.
ParseSubtargetFeatures(CPUName, FullFS);
- // Make sure the right MCSchedModel is used.
- InitCPUSchedModel(CPUName);
-
InstrItins = getInstrItineraryForCPU(CPUName);
// It's important to keep the MCSubtargetInfo feature bits in sync with
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