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authorPuyan Lotfi <puyan@puyan.org>2015-05-22 08:11:26 +0000
committerPuyan Lotfi <puyan@puyan.org>2015-05-22 08:11:26 +0000
commitbb457b973d4d8ce10b554c5409ebdc302aaf5012 (patch)
tree81fd8c3c09aa50a631c2e6e898a27983388ffb34 /llvm/lib
parent263b27997d5a1d4bab75c2cd20a397ed80e32925 (diff)
downloadbcm5719-llvm-bb457b973d4d8ce10b554c5409ebdc302aaf5012.tar.gz
bcm5719-llvm-bb457b973d4d8ce10b554c5409ebdc302aaf5012.zip
Compile time improvements to VirtRegRewriter.
This change to VirtRegRewriter::addMBBLiveIns adds live-in registers for each MachineBasicBlock's LiveIns set without isLiveIn checks as they are being added because doing so is expensive. After all live-in registers are added, the LiveIn vectors are sorted and uniqued. llvm-svn: 238008
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/VirtRegMap.cpp11
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/VirtRegMap.cpp b/llvm/lib/CodeGen/VirtRegMap.cpp
index d9adfdf7b2e..9fb1b5b65fb 100644
--- a/llvm/lib/CodeGen/VirtRegMap.cpp
+++ b/llvm/lib/CodeGen/VirtRegMap.cpp
@@ -264,8 +264,7 @@ void VirtRegRewriter::addMBBLiveIns() {
if ((SubRegLaneMask & S.LaneMask) == 0)
continue;
for (unsigned i = 0, e = LiveIn.size(); i != e; ++i) {
- if (!LiveIn[i]->isLiveIn(SubReg))
- LiveIn[i]->addLiveIn(SubReg);
+ LiveIn[i]->addLiveIn(SubReg);
}
}
LiveIn.clear();
@@ -277,12 +276,16 @@ void VirtRegRewriter::addMBBLiveIns() {
if (!Indexes->findLiveInMBBs(Seg.start, Seg.end, LiveIn))
continue;
for (unsigned i = 0, e = LiveIn.size(); i != e; ++i)
- if (!LiveIn[i]->isLiveIn(PhysReg))
- LiveIn[i]->addLiveIn(PhysReg);
+ LiveIn[i]->addLiveIn(PhysReg);
LiveIn.clear();
}
}
}
+
+ // Sort and unique MBB LiveIns as we've not checked if SubReg/PhysReg were in
+ // each MBB's LiveIns set before calling addLiveIn on them.
+ for (MachineBasicBlock &MBB : *MF)
+ MBB.sortUniqueLiveIns();
}
void VirtRegRewriter::rewrite() {
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